Memory

1 / 16

# Memory - PowerPoint PPT Presentation

Memory. Section 7.2. Types of Memories. Definitions Write: store new information into memory Read: transfer stored information out of memory R andom- A ccess M emory (RAM) Can read and write Read-Only-Memory (ROM) Read only. Interesting Facts.

I am the owner, or an agent authorized to act on behalf of the owner, of the copyrighted work described.

## Memory

Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author.While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server.

- - - - - - - - - - - - - - - - - - - - - - - - - - E N D - - - - - - - - - - - - - - - - - - - - - - - - - -
Presentation Transcript
1. Memory Section 7.2

2. Types of Memories • Definitions • Write: store new information into memory • Read: transfer stored information out of memory • Random-Access Memory (RAM) • Can read and write • Read-Only-Memory (ROM) • Read only

3. Interesting Facts • Interesting fact of RAM: the time it takes to transfer information to or from any desired random location is always the same • A word =a group of bits • A group of 8 bits is called a byte.

4. Two Types of RAM • Static RAM (SRAM): Stored information remains valid as long as power is applied to the unit. • Dynamic RAM (DRAM): Stores binary information in the form of electric charges on capacitor provided inside the chip by MOS transistors.

5. 74LS189 RAM 64 bits=16 4-bits words.

6. Block Diagram of a Memory Unit

7. 74LS189 RAM [A3,A2,A1,A0]=address inputs [D3,D2,D1,D0]=data inputs [S3,S2,S1,S0]=outputs ME,WE control the direction of transfer VCC=power GND=ground

8. Logic Diagram memory cell Each word is enabled by the 4-input AND

10. Logic Diagram memory cell Each word is enabled by the 4-input AND

11. Switch Characteristics

12. Switching Time Waveforms 17 nS 23 nS A negative hold time means that the address/data can change before the rising edge of WE because the there is internal delay through the chip. -7 nS for address -14 nS for data

13. Write (ME=0, WE=0) D1 1 D2 1 D3 1 D4 [hi Z?] 1 1 0 0 0

14. READ (ME=0, WE=1) 0 1 1 Complement of data stored 0

15. HOLD (ME=1, WE=X) X 0 Hi-Z output 1

16. Memory Description in Verilog Need 6 bits address for 26=64 words. memory depth: 64 words word length 4-bits