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The Development of Large-Area Psec-Resolution TOF Systems. Henry Frisch Enrico Fermi Institute and Physics Dept University of Chicago. With Harold Sanders, and Fukun Tang (EFI-EDG ) Karen Byrum and Gary Drake (ANL); Tim Credo (IMSA, now Harvard), Shreyas Bhat, and David Yu (students).

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The development of large area psec resolution tof systems l.jpg

The Development of Large-Area Psec-Resolution TOF Systems

Henry Frisch

Enrico Fermi Institute and Physics Dept

University of Chicago

With Harold Sanders, and Fukun Tang (EFI-EDG)Karen Byrum and Gary Drake (ANL); Tim Credo (IMSA, now Harvard), Shreyas Bhat, and David Yu (students)

HJF DOE Review


What is the intrinsic limit for tof for rel particles l.jpg

What is the intrinsic limit for TOF for rel. particles?

Typical path lengths for light and electrons are set by physical dimensions of the light collection and amplifying device.

These are now on the order of an inch. One inch is 100 psec. That’s what we measure- no surprise! (pictures swiped from T. Credo talk at Workshop)

HJF DOE Review


Major advances for tof measurements l.jpg

Micro-photograph of Burle 25 micron tube- Greg Sellberg (Fermilab)

Major advances for TOF measurements:

1. Development of MCP’s with 6-10 micron pore diameters

HJF DOE Review


Major advances for tof measurements4 l.jpg

Output at anode from simulation of 10 particles going through fused quartz window- T. Credo, R. Schroll

Major advances for TOF measurements:

Jitter on leading edge 0.86 psec

2. Ability to simulate electronics and systems

to predict design performance

HJF DOE Review


Major advances for tof measurements5 l.jpg

Simulation with IHP Gen3 SiGe process- Fukun Tang (EFI-EDG) through fused quartz window- T. Credo, R. Schroll

Major advances for TOF measurements:

3. Electronics with typical gate jitters << 1 psec

HJF DOE Review


Geometry for a collider detector l.jpg

Geometry for a Collider Detector through fused quartz window- T. Credo, R. Schroll

2” by 2” MCP’s

Beam Axis

“r” is expensive- need a thin segmented detector

Coil

HJF DOE Review


Generating the signal l.jpg

Generating the signal through fused quartz window- T. Credo, R. Schroll

A 2” x 2” MCP- actual thickness ~3/4”

e.g. Burle (Photonis) 85022-with mods per our work

Use Cherenkov light - fast

HJF DOE Review


Anode structure l.jpg

  • RF Transmission Lines through fused quartz window- T. Credo, R. Schroll

  • Summing smaller anode pads into 1” by 1” readout pixels

  • An equal time sum- make transmission lines equal propagation times

  • Work on leading edge- ringing not a problem for this fine segmentation

Anode Structure

HJF DOE Review


Tim s equal time collector l.jpg

Tim’s Equal-Time Collector through fused quartz window- T. Credo, R. Schroll

4 Outputs- each to a TDC chip (ASIC)

Chip to have < 1psec resolution(!)

-we are doing this in the EDG (Harold, Tang).

Equal-time transmission-line traces to output pin

HJF DOE Review


Dummy 1 l.jpg
Dummy 1 through fused quartz window- T. Credo, R. Schroll

HJF DOE Review


Anode return path problem l.jpg
Anode Return Path Problem through fused quartz window- T. Credo, R. Schroll

HJF DOE Review


Solving the return path problem l.jpg

0.250 through fused quartz window- T. Credo, R. Schroll

0.160

0.070

2 in.

Solving the return-path problem


Capacitive return path l.jpg
Capacitive Return Path through fused quartz window- T. Credo, R. Schroll

HJF DOE Review


Mounting electronics on back of mcp matching l.jpg

Mounting electronics on back of MCP- matching through fused quartz window- T. Credo, R. Schroll

Conducting Epoxy- machine deposited by Greg Sellberg (Fermilab)

dum

HJF DOE Review


Edg s unique capabilities harold s design for readout l.jpg

EDG’s Unique Capabilities - Harold’s Design for Readout through fused quartz window- T. Credo, R. Schroll

Each module has 5 chips- 4 TDC chips (one per quadrant) and a DAQ `mother’ chip.

Problems are stability, calibration, rel. phase, noise.

Both chips are underway

dum

HJF DOE Review


Tang s work in ihp 200 ghz design tools l.jpg

Tang’s work in IHP (200 GHz) design tools through fused quartz window- T. Credo, R. Schroll

dum

HJF DOE Review


Requirement psec resolution tdc l.jpg
Requirement: Psec-Resolution TDC through fused quartz window- T. Credo, R. Schroll

Tang Slide

MCP_PMT Output Signal

Start

500pS

Reference Clock

Stop

Tw

1 ps Resolution Time-to-Digital Converter!!!

HJF DOE Review


Approaches possibilities l.jpg
Approaches & Possibilities through fused quartz window- T. Credo, R. Schroll

(2) Time Stretcher

Tang Slide

1/4

“Zero”-walk Disc.

Stretcher

Driver

11-bit Counter

Receiver

PMT

CK5Ghz

2 Ghz PLL

REF_CLK

HJF DOE Review

psFront-end (Timing Module Option #2)


Time stretcher simulation result l.jpg
Time Stretcher: through fused quartz window- T. Credo, R. Schroll Simulation Result

Tang Slide

x200 StretchedTime Interval (Output Signal )

Stretched Time = 274ns

(pedestal=74ns)

1ns Time Interval (Input Signal)

HJF DOE Review

0 50ns 100ns 150ns 200ns 250ns 300ns


Vco submission of oct 2006 l.jpg
VCO: Submission of Oct. 2006 through fused quartz window- T. Credo, R. Schroll

Ultimate Goal:

  • To build TDC with 1 pSec Resolution for Large Scale of Time-of-Flight Detector.

    Primary Goal:

  • To build 2-Ghz VCO, key module of PLL that generates the TDC reference signal

    • Cycle-to-Cycle Time-jitter < 1 ps

  • To evaluate IHP SG25H1/M4M5 Technology for our applications

  • To gain experiences on using Cadence tools (Virtuoso Analog Environment)

    • Circuit Design(VSE)

    • Simulation(Spectre)

    • Chip Layout(VLE, XLE, VCAR)

    • DRC and LVS Check (Diva, Assura, Calibre)

    • Parasitic Extraction(Diva)

    • Post Layout Simulation(Spectre)

    • GDSIIStream out

    • Validation

    • Tape Out

  • Tang Slide

    HJF DOE Review


    Diagram of phase locked loop l.jpg
    Diagram of Phase-Locked Loop through fused quartz window- T. Credo, R. Schroll

    Tang Slide

    CP

    Fref

    I1

    Uc

    PD

    VCO

    F0

    LF

    I2

    1N

    PD: Phase Detector

    CP: Charge Pump

    LF: Loop Filter

    VCO: Voltage Controlled Oscillator

    HJF DOE Review


    Ihp sg25h1 0 25 m m sige bicmos technology l.jpg
    IHP (SG25H1) 0.25 through fused quartz window- T. Credo, R. Schroll mm SiGe BiCMOS Technology

    • 0.25mm BiCMOS technology

    • 200Ghz NPN HBT (hetero-junction bipolar transistor)

    • MIM Capacitors (layer2-layer3) ( 1f/1u2 )

    • Inductors (layer3-layer4)

    • High dielectric stack for RF passive component

    • 5 metal layers (Al)

    • Digital Library: Developing

    Tang Slide

    HJF DOE Review


    Sg25 process specification l.jpg

    Tang Slide through fused quartz window- T. Credo, R. Schroll

    SG25 Process Specification

    HJF DOE Review


    2 ghz bicmos vco schematic l.jpg

    Tang Slide through fused quartz window- T. Credo, R. Schroll

    2-GHz BiCMOS VCO Schematic

    Negative Resistance and Current-Limited Voltage Control Oscillator with Accumulating PMOS Varicap and 50W Line Drivers

    HJF DOE Review


    V f plot 3 model cases @ 27c 55c l.jpg
    V-F Plot (3 model cases @ 27C-55C) through fused quartz window- T. Credo, R. Schroll

    Frequency

    Tang Slide

    Temperature:27C-55C

    Supply:VDD=2.5V

    VControl varied 0.18V

    VControl

    HJF DOE Review


    Phase noise 3 model cases @ 27c l.jpg
    Phase Noise ( 3 model cases @ 27C) through fused quartz window- T. Credo, R. Schroll

    @100KHz offset

    Worst

    Tang Slide

    Typical

    Best

    Tang Slide

    Temperature:27C

    Supply:VDD=2.5V

    HJF DOE Review


    Calculation of cycle to cycle jitter l.jpg
    Calculation of Cycle-to-Cycle Jitter through fused quartz window- T. Credo, R. Schroll

    Tang Slide

    HJF DOE Review


    Virtuoso xl layout view l.jpg
    Virtuoso XL Layout View through fused quartz window- T. Credo, R. Schroll

    Tang Slide

    HJF DOE Review


    Virtuoso chip assembly router view l.jpg
    Virtuoso Chip Assembly Router View through fused quartz window- T. Credo, R. Schroll

    Tang Slide

    HJF DOE Review


    Transit analysis comparison of schematic and post layout simulations l.jpg
    Transit Analysis: Comparison of Schematic and Post Layout Simulations

    [email protected] loads

    Schematic

    Post Layout

    HJF DOE Review

    Tang Slide


    Simulation for coil showering and various pmts shreyas bhat l.jpg
    Simulation for Coil Showering and various PMTs ( SimulationsShreyas Bhat)

    • Right now, we have a simulation using GEANT4, ROOT, connected by a python script

    • GEANT4: pi+ enters solenoid, e- showers

    • ROOT: MCP simulation - get position, time of arrival of charge at anode pads

    • Both parts are approximations

    • Could we make this less home-brew and more modular?

    • Could we use GATE (Geant4 Application for Tomographic Emission) to simplify present and future modifications?

    • Working with Prof. Chin-tu Chen and students, UCHospitals Radiology- they know GATE very well, use it regularly

    HJF DOE Review


    Possible collider applications l.jpg

    • Separating b from b-bar in measuring the top mass (lessens combinatorics)

    • Identifying csbar and udbar modes of the W to jj decays in the top mass analysis (need this once one is below 1 GeV, I believe)

    • Separating out vertices from different collisions at the LHC in the z-t plane

    • Identifying photons with vertices at the LHC (requires spacial resolution and converter ahead of the TOF system

    • Locating the Higgs vertex in H to gamma-gamma at the LHC (mass resolution)

    • Kaon ID in same-sign tagging in B physics (X3 in CDF Bs mixing analysis)

    • Fixed target geometries- LHCb, Diffractive LHC Higgs, (and rare K and charm FT experiments)

    • Super-B factory (Nagoya Group, V’avra at SLAC)

    Possible Collider Applications


    Synergies the ilc radiology anl fermilab slac bsd saclay photonis l.jpg

    • ILC- met with Fermilab last week to discuss possible ILC applications- have propsed a workshop with them to explore physics of particle ID at the ILC

    • Positron-Emission Tomography – have a draft of a proposal to UC for a program for applying HEP techniques to radiology -with Chin-Tu Chen, Radiology

    • Have agreed to write MOU with Saclay (Patrick LeDu)

    • Have agreed to write MOU withPhotonis/Burle to develop new MCPs optimized for timing

    • We are working with Jerry V’avra (SLAC) on measurement setups (Karen and Gary at ANL have the setup).

    Synergies- The ILC, RadiologyANL,Fermilab,SLAC, BSD,Saclay, Photonis


    Status l.jpg

    • Have a simulation of Cherenkov radiation in MCP into electronics

    • Have placed an order with Burle- have the 1st of 4 tubes and have a good working relationship (their good will and expertise is a major part of the effort): 10 micron tube in the works; optimized versions discussed

    • Have licence and tools from IHP working on our work stations- Tang is adept and fast working with them. Excellent support from Cadence.

    • Have modeled DAQ/System chip in Altera (Jakob Van Santen: Sr)

    • ANL has put together a test stand with working DAQ, has bought a very-fast laser, has made contact with advanced accel folks:(+students)

    • Have established strong working relationship with Chin-Tu Chen’s PET group at UC; source of good students; common interests (with Saclay too). Hope can establish a program in the application of HEP to meds

    • Harold and Tang have a good grasp of the overall system problems and scope, and have a top-level design plus details

    • Have found Greg Sellberg at Fermilab to offer expert precision assembly advice and help (wonderful tools and talent!).

    • 9. Are working closely with Jerry V’avra (SLAC); will work with Saclay

    Status

    HJF DOE Review


    Next steps l.jpg

    This was the text on my penultimate slide at the workshop at Arlington TX in April

    • Start testing the MK-0 device we have (ANL)

    • Understand the electrical circuit in the MCP and specify the next model (MK-I) we want

    • Finish the design and place the order to IHP for the 1st chip.

    Next Steps

    THE END (not really)

    Substantial Progress on all 3

    See hep.uchicago.edu/~frisch

    For more documents and links

    HJF DOE Review


    The electronics development group of the efi l.jpg
    The Electronics Development Group Arlington TX in Aprilof the EFI

    • Over a million dollars of software tools from a number of vendors- built up by Harold. Nowhere else I know of…

    • Major impact on CDF,Atlas, KTeV, Quiet, …

    • Serves not just UC- other institutions send folks here- systems are collaborative

    • Student involvement- we train students in cutting-edge electronics (grad and underg)

    • Highly innovative designs -

    HJF DOE Review


    Doe adr funds l.jpg
    DOE-ADR Funds Arlington TX in April

    • First chip submission was last week-ADR

    • Tang leaves tomorrow for Germany for IHP Workshop-ADR

    • Starting on next submission design…

    • Will seed collaborative work with ANL, SLAC (V’avra), and, hopefully, Fermilab

    • Would like to discuss longer-term support for a program of Applications of HEP Techniques to Radiology, and also some EDG support.

    HJF DOE Review


    Backup slides l.jpg
    Backup Slides Arlington TX in April

    Miscellaneous…..

    HJF DOE Review


    Got burle mk 0 our name many thanks l.jpg
    Got Burle MK-0 (our name)- many thanks! Arlington TX in April

    • Paul Mitchell has done nice things- wonderful test bed for understanding

    HJF DOE Review


    V f plot comparison of schematic and post layout simulations l.jpg
    V-F Plot: Comparison of Schematic and Post Layout Simulations

    Frequency

    PostLayout

    Schematic

    Vcontrol

    HJF DOE Review


    Phase noise post layout simulations vdd 2 5v temp 27c 55c l.jpg
    Phase Noise: Post Layout Simulations SimulationsVDD=2.5V Temp.=27C, 55C

    Phase Noise @100KHZ offset

    HJF DOE Review


    A real cdf event r phi view l.jpg

    A real CDF event- r-phi view Simulations

    Key idea- fit t0 (start) from all tracks

    HJF DOE Review


    Conclusion l.jpg
    Conclusion Simulations

    (1) VCO time-jitter met our requirement.

    (2) Post layout simulation matched schematic simulation very well.

    (3) Some problems we have encountered with pcell library, layout, DRC, LVS and auto-routing functionalities.

    (4)Ready for October Submission.

    HJF DOE Review


    Slide44 l.jpg

    Shreyas Bhat slide Simulations

    π+ Generation, Coil

    Showering

    GEANT4

    • Input Source code, Macros Files

    • Geometry

    • Materials

    • Particle:

      • Type

      • Energy

      • Initial Positions, Momentum

    • Physics processes

    • Verbose level

    Have position,

    time, momentum,

    kinetic energy of

    each particle for each step

    (including upon entrance to PMT)

    • Need to redo geometry (local approx.➔ cylinder)

    • Need to redo field

    • Need to connect two modules (python script in placefor older simulation)

    PMT/MCP

    GEANT4 - swappable

    Pure GEANT4

    Get position, time

    HJF DOE Review


    Slide45 l.jpg

    Shreyas Bhat slide Simulations

    π+ Generation

    GATE

    • Input Macros Files - precompiledsource

    • Geometry

    • Materials

    • Particle:

      • Type

      • Energy

      • Initial Positions, Momentum

    • Verbose level

    Physics processes

    macros file

    Solenoid Showering

    GATE

    But, we need to write

    Source code for

    Magnetic Field, recompile

    PMT/MCP

    GATE - swap with

    default “digitization”

    module

    GATE

    Get position, time

    HJF DOE Review


    The hard parts reality l.jpg

    • Haven’t yet plugged in a device- all simulation Simulations

    • Harold and Paul Mitchell (Burle) have taught us that the hard part is the return path from MCP-OUT to the Gd

    • Haven’t yet submitted a design to IHP- don’t know the realities of making chips (in progress as we speak)

    • Have no equipment to test these chips when we get them

    • Have no experience on how to measure device performance when we actually get them.

    • We are a small group- lots to do!

    The Hard Parts- Reality

    HJF DOE Review


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