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ENT 116 COMBINATIONAL LOGIC ANALYSIS

ENT 116 COMBINATIONAL LOGIC ANALYSIS. Academic Session : 2016-2017 Semester: 2 School of Mechatronic Engineering Universiti Malaysia Perlis ( UniMAP ) Malaysia. AND-OR LOGIC. - The AND-OR circuit can have any number of AND gates, each with any number of inputs. Problem.

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ENT 116 COMBINATIONAL LOGIC ANALYSIS

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  1. ENT 116 COMBINATIONAL LOGIC ANALYSIS Academic Session : 2016-2017 Semester: 2 School of Mechatronic Engineering Universiti Malaysia Perlis (UniMAP) Malaysia

  2. AND-OR LOGIC - The AND-OR circuit can have any number of AND gates, each with any number of inputs

  3. Problem • In certain chemical processing plant, a liquid chemical is used in a manufacturing process. The chemical is stored in three different tanks. A level sensor in each tank produces a HIGH voltage when the level of chemical in the tank drops below a specified point. • Question: Design a circuit that monitors the chemical level in each tank and indicates when the level in any 2 of the tanks drops below a specified point.

  4. SOLUTION The AND gate G1 checks the level in tanks A and B, gate G2 checks tanks A and C, and gate G3 checks tanks B and C. When the chemical level in any two of the tanks gets too low, one of the AND gates will have HIGHs on both of its inputs, causing its output to be HIGH; and so the final output X from OR gate is HIGH. This HIGH input is then used to activate an indicator.

  5. AND-OR-Invert logic - When the output of an AND-OR circuit is inverted, it results in an AND-OR-Invert (AOI) circuit. - In general, an AOI circuit can have any number of AND gates, each with any number of inputs.

  6. PROBLEM • In certain chemical processing plant, a liquid chemical is used in a manufacturing process. The chemical is stored in three different tanks. A level sensor in each tank produces a LOW voltage when the level of chemical in the tank drops below a critical point. • Question: Design a circuit that monitors the chemical level in each tank and indicates when the level in any 2 of the tanks drops below the critical point

  7. SOLUTION The AND gate G1 checks the level in tanks A and B, gate G2 checks tanks A and C, and gate G3 checks tanks B and C. When the chemical level in any two of the tanks gets too low, each AND gates will have a LOW on at least one input, causing its output to be LOW; and so the final output X from The inverter gate is HIGH. This HIGH input is then used to activate an indicator.

  8. Exclusive-OR logic The output expression for the circuit X = AB’+A’B

  9. Exclusive-nor logic - The complement of exclusive OR is exclusive NOR. - The exclusive-NOR can be implemented by simply inverting the expression A’B’ +AB as follow;

  10. Implementing combinational logic OR X=AB+CDE AND

  11. Implementing combinational logic X=AB(CD’+EF) - Total propagation delay time through a logic circuit is a major consideration. Propagation delay are additive, so more gates or inverters between input and output, the greater the propagation delay time. - It is usually best to reduce a circuit to its SOP form in order to reduce the propagation delay time

  12. Truth table to logic circuit

  13. Truth table to logic circuit

  14. EXERCISE

  15. Problem 1 • The board of directors has four members; a president, a vice-president, a secretary, and a treasurer. Each member has a single yes/no vote. For a decision to pass, a majority of the board members must vote yes. In the event of a tie, the president’s vote will be used to break the tie (i.e., if the president votes yes, the decision passes. If the president votes no, the decision fails.).

  16. Construct the truth table for the given problem. • Based on the truth table, simplify using K-Map. • Design a logic circuit based on the given problem. • By using Boolean Algebra, demonstrate that the expression obtained in c(ii) will produce the same results.

  17. Problem 2 • Construct a truth table for a logic circuit which has four inputs A, B, C and D and the output, Y will be HIGH only when at least two of the inputs are HIGH. From the truth table, formulate the Boolean expression for the Sum of Products (SOP). Based on the truth table obtained, derive the Karnaugh’s map and design the logic circuit for Sum of Products (SOP).

  18. Problem 3 • An automobile alarm circuit is used to detect certain undesirable conditions. Four input swithes are used to indicate the status of the door by the driver’s seat, the ignition, the handbrake and the headlights, respectively. Design the truth table, logic circuit using four switches as inputs so that the alarm will be activated whenever any of the following conditions exists. • The door is open and handbrake is off. • The door is open, the handbrake is off while the ignition is on.

  19. The NAND gate as a universal logic element

  20. The NOR gate as a universal element

  21. Combinational logic using NAND

  22. Combinational logic using NAND

  23. Combinational logic using NOR

  24. LOGIC CIRCUIT OPERATION WITH PULSE WAVEFORM INPUTS

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