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COMBINATIONAL LOGIC. Overview. Combinational vs. Sequential Logic. At every point in time (except during the switching. transients) each gate output is connected to either. V. or. V. via a low-resistive path. DD. ss. The outputs of the gates assume at all times the value.

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Presentation Transcript
static cmos circuit
At every point in time (except during the switching

transients) each gate output is connected to either

V

or

V

via a low-resistive path.

DD

ss

The outputs of the gates assumeat all timesthevalue

of the Boolean function, implemented by the circuit

(ignoring, once again, the transient effects during

switching periods).

This is in contrast to the

dynamic

circuit class, which

relies on temporary storage of signal values on the

capacitance of high impedance circuit nodes.

Static CMOS Circuit
nmos transistors in series parallel connection
NMOS Transistors in Series/Parallel Connection
  • Transistors can be thought as a switch controlled by its gate signal
  • NMOS switch closes when switch control input is high
4 input nand gate
4-input NAND Gate

Vdd

Out

GND

In1

In2

In3

In4

dynamic 4 input nand gate
Dynamic 4 Input NAND Gate

VDD

Out

In1

In2

In3

In4

f

GND

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