Chapter 4. Combinational Logic. 4.1 Introduction. Logic circuits for digital systems may be. . combinational or sequential. A combinational circuit consists of logic gates. . whose outputs at any time are determined. from only the present combination of inputs. 2.
Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author.While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server.
Logic circuits for digital systems may be
combinational or sequential.
A combinational circuit consists of logic gates
whose outputs at any time are determined
from only the present combination of inputs.
Logic circuits for digital system
contain memory elements
the outputs are a function of the current inputs and the
state of the memory elements
the outputs also depend on past inputs
2 possible combinations of input values
n input m output
Adders, subtractors, comparators, decoders, encoders,
A combinational circuit
make sure that it is combinational not sequential
No feedback path
derive its Boolean functions (truth table)
1 3 2 2 1
The design procedure of combinational circuits
State the problem (system spec.)
determine the inputs and outputs
the input and output variables are assigned symbols
derive the truth table
derive the simplifi
erive the simplified Bool
draw the logic diagram and verify the correctness
HDL (Hardware description language)
number of gates
number of inputs to a gate
number of interconnection
limitations of the driving capaeilities
BCD to excess-3 code
The truth table
z = D'
y = CD +C'D‘
x = B'C + B‘D+BC'D'
w = A+BC+BD
z = D'
y = CD +C'D' = CD + (C+D)'
x = B'C + B'D+BC'D‘ = B'(C+D) +B(C+D)'
w = A+BC+BD
0 + 0 = 0 ; 0 + 1 = 1 ; 1 + 0 = 1 ; 1 + 1 = 10
two input variables: x, y
two output variables: C (carry), S (sum)
C = xy
the flexibility for implementation
S = (x+y)(x'+y')
S = (C+x'y')'
C = xy = (x'+y')x
1Functional Block: Full-Adder
The arithmetic sum of three input bits
three input bits
x, y: two significant bits
z: the carry bit from the previous lower significant bit
Two output bits: C, S
C = xy + xz + yz
S = zÅ (xÅy)
C = z(xy'+x'y)+xy
= xy'z+x'yz+ xy
when the correct outputs are available
the critical path counts (the worst case)
employ faster gates
look-ahead carry (more complex mechanism, yet
carry propagate: P
i i i
carry generate: G
i i i
sum: S = P
i i i
= G +P C
i+1 i i i
1 0 0 0
2 1 1 1 1 1 0 0 0
1 1 0 1 0 0
3 2 2 2 2 2 1 2 1 0 2 1 0 0
A-B = A+(2’s complement of B)
M=0, A+B; M=1, A+B’+1
The storage is limited
Add two positive numbers and obtain a negative
Add two negative numbers and obtain a positive
V = 0, no overflow; V = 1, overflow