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Registrid Registers

Registrid Registers. RG. q 0. d 0. d 0. RG. q 0. d 1. d 1. q 1. q 1. d n-1. q n-1. d n-1. q n-1. c. c. q 3. q 2. q 1. q 0. TT. TT. TT. TT. c. D. c. D. c. D. c. D. c. d 3. d 2. d 1. d 0. Asetusega register. d 0. RG. q 0. RG. q 0. d 0.

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Registrid Registers

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  1. RegistridRegisters RG q 0 d 0 d 0 RG q 0 d 1 d 1 q 1 q 1 d n-1 q n-1 d n-1 q n-1 c c q3 q2 q1 q0 TT TT TT TT c D c D c D c D c d3 d2 d1 d0 T. Evartson

  2. Asetusega register d 0 RG q 0 RG q 0 d 0 d 1 q 1 d 1 q 1 d n-1 q n-1 d n-1 c q n-1 R R c q3 q2 q1 q0 TT TT TT TT c D c D c D c D R R R R C RESET d3 d2 d1 d0 T. Evartson

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  4. Register mis võimldab valida kahe info allika vahel. d 0 RG q 0 b0 q 1 d 1 b1 q n-1 d n-1 bn-1 qi c w M=1 bi => RG TT M=0 di => RG J c K C 1 1 & & & & M 1 1 1 bi di T. Evartson

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  6. NihkeregisterShift register q 3 q 2 q 1 q 0 q 3 q 2 q 1 q 0 RO LI q 3 q 2 q 1 q 0 LO RI q3 q2 q1 q0 LI S S S S TT TT TT TT c c c c 1 R R R R c T. Evartson

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  9. Nihkeregister paralleel laadimisega PL=1 di => RG qi PL=0 R1 qi+1 TT TT R c T R c T C RESET 1 & & PL 1 + + di T. Evartson

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  12. Reversiivsed nihkeregistrid q 3 q 2 q 1 q 0 RO M=1 LI q 3 q 2 q 1 q 0 LO RI M=0 qi+1 qi qi-1 TT TT TT c D c D c D c di di+1 di-1 1 & & M 1 T. Evartson

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