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A New Algorithm to Compute the Discrete Cosine Transform

A New Algorithm to Compute the Discrete Cosine Transform. VLSI Signal Processing 台灣大學電機系 吳安宇. 1. B. G. Lee “A new algorithm to compute the discrete cosine trnsform,” IEEE Trans. Acoust., Speech, Signal Processing , vol. ASSP-32, pp.1243-1245, Dec. 84

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A New Algorithm to Compute the Discrete Cosine Transform

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  1. A New Algorithm to Compute theDiscrete Cosine Transform VLSI Signal Processing 台灣大學電機系 吳安宇 1. B. G. Lee “A new algorithm to compute the discrete cosine trnsform,” IEEE Trans. Acoust., Speech, Signal Processing, vol. ASSP-32, pp.1243-1245, Dec. 84 2. W. H. Chen, C. H. Smith, and S. C. Fralick, “A fast computational algorithm for the discrete cosine transform,” IEEE Trans. Commun., vol. COM-25, pp.1004-1009, Sept. 77

  2. N-Point IDCT • Decomposing into even and odd indexes of n, we define

  3. Using the trigonometric identity to rearrange Rearrange for Decimation in Time

  4. N-Point IDCTDecomposed into N/2-Point IDCT

  5. N-Point IDCT Architecture • Take transpose form, we can obtain DCT architecture

  6. Sample : 8-Point IDCT

  7. Complexity Comparison

  8. Unified Parallel Lattice Structuresfor Time-Recursive DiscreteCosine/Sine/Hartley Transform VLSI Signal Processing 台灣大學電機系 吳安宇 1. K. J. R. Liu and C.T. Chiu “Unified parallel lattice structures for time-recursive discrete cosine/sine/Hartley transform,” IEEE Trans. Signal Processing,vol. SP-41, pp. 1357-1377, March 93.

  9. DCT Definition

  10. DCT at time t • Decompose in • and DCT at time (t+1) (See Fig. 1) Time-Recursive DCT

  11. DST Definition

  12. DST at time t • Decompose in • and DST at time (t+1) (See Fig. 1) Time-Recursive DCT

  13. Hardware Architecture

  14. Time Recursive Relationship The relationship between the and the data sequence

  15. Overall Architecture

  16. Special Case for k=0 for the DCT and k=N for the DST

  17. The parallel lattice structure for DCT and DST

  18. Architectural Comparison Lee Our approach I/O Operation Architecture Communication Hardware cost Operating frequency PIPO Modular Global Large, O(Nlog2N) fs / N SIPO Modulare and Regular Local Small, O(N) fs fs : Input data rate Architecture Comparison 1. K. J. R. Liu and C.T. Chiu “Unified parallel lattice structures for time-recursive discrete cosine/sine/Hartley transform,” IEEE Trans. Signal Processing, vol. SP-41, pp. 1357-1377, March 93. 2. B. G. Lee “A new algorithm to compute the discrete cosine trnsform,”, IEEE Trans. Acoust., Speech, Signal Processing, vol. ASSP-32, pp.1243-1245, Dec. 84

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