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Network Switches: Overview and Evolution

Network Switches: Overview and Evolution. David Bumpus Charles Cutrera. Early Switches. This is an example of an early switch It is binary — having an ‘ on ’ and ‘ off ’ position. Throughput depends on speed of user. Modern Switches. What is a Switch?.

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Network Switches: Overview and Evolution

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  1. Network Switches: Overview and Evolution David Bumpus Charles Cutrera

  2. Early Switches • This is an example of an early switch • It is binary—having an ‘on’ and ‘off’ position. • Throughput depends on speed of user.

  3. Modern Switches

  4. What is a Switch? • Bridges, switches, and routers can all be considered hubs. • All forward messages from one link to another. • Distinction based on layering: • Bridges connect link level nodes • Switches connect network network level nodes • Routers connect different networks to form an internetwork or internet.

  5. Bridges • A bridge is used to forward packets between shared media local area networks (LAN’s). • Example: connecting two Ethernets to form an extended LAN. • Originally ran in promiscuous mode. • Optimized now to be learning bridges.

  6. Switches links • Switches transmit packets from one link to another. • Sole function is to store and forward packets. • This is an example of a packet-switched network. switches

  7. Routers • Routers are nodes that connect different networks to form an internetwork.

  8. Design Goals Hardware Design Network Design

  9. Hardware Design • Throughput • Note: switches described as n x m—n inputs and m outputs. Often, but not always, n = m. • Links are not always all the same speed.

  10. Throughput Factors • If a switch has n inputs with each having a link speed of Sn, then the optimal throughput of this switch would be n x Sn. • Almost no real switch can guarantee this kind of performance. Why? Contention for the same link leads to congestion. • Throughput will be adversely affected if most packets are directed to one output port—throughput is better when traffic is evenly distributed. • Packet Size • Some operations a switch must perform have constant overhead, so processing smaller packets is not as efficient as handling larger ones. Ethernet packets do vary greatly in size (including preamble, frames vary from 72 to 1526 bytes).

  11. Improving Throughput • Traffic Modeling • Switch designers devote much time to developing traffic models that will accurately simulate real data traffic. • Hard to do—telephone traffic modeling has been much more successful, partly because user patterns do not change much over time. Data traffic patterns, on the other hand, has been described as “chaotic.”

  12. Hardware Design (cont’d) • Scalability • Measured in: • Rate of increase of cost—how fast do hardware costs increase as number of inputs/outputs increases? N2 is better than N3. • Maximum possible switch size—most switch designs encounter problems after a certain number of inputs and outputs.

  13. Hardware Design (cont’d) • Cost • Switches that require a liquid nitrogen cooling system are generally not feasible. • Buyers look at metrics like: • Perfomance per unit cost. • Cost per port of a given speed.

  14. Design Goals: The Network Engineer’s Perspective • Quality of Service (QoS) • Switches and networks must be multiplexed, or shared among multiple users.

  15. Maintaining QoS • How can a switch be multiplexed fairly? • FIFO-First In, First Out • Limit transmission sizes—set limits on packet sizes. • Round Robin algorithm. • Give priority to certain users. • Divide traffic into two classes: guaranteed class and best effort class. • Could base priorities on MAC addresses, src and dest IP addresses, range of TCP or UDP ports, etc. • Classify traffic type: voice, video, data, etc.

  16. Evolution of Switches A Switch basically forwards information from one connection to another, many ways have been devised to do this.

  17. computer CPU Queues in memory One Processor, one bus, individual memory Control computer bus line card line card line card front end processors / line cards One Processor, shared memory Central processor Each line card has it’s own processor and memory(buffer) OLC 1 1 ILC NxN packet switch fabric OLC 2 ILC 2 OLC N ILC N 3 basic designs

  18. 1 2 N 1 2 N De-Mux 1 2 N MUX Multiplexors and demultiplexors • A multiplexor condenses many input lines into one outgoing line. The perfect mutliplexor runs N times as fast as the inputs • A demultiplexor takes this as the input and breaks it into many output lines, each going N times as slow as the input.

  19. 1 2 3 4 2 4 1 3 4 3 2 1 Time Slot Interchange By changing the time at which packets are demuxed we can get them in a more useful order that helps us to forward them to the correct outputs

  20. Problem Suppose you need to handle 120,000 phone circuits. Each circuit reads and writes memory once every 125 ms. The number of operations is about 2billion per second (about half a nanosecond per operation) this is impossible with current technology

  21. i n p u t s outputs Space division switching With space division switching each item takes a different route to it’s output. The crosspoints can be turned on or off.

  22. Crossbar Switches • With the optimization of the linecards by giving each its own CPU and buffer, the shared bus between cards becomes the bottleneck, since only one card can use the bus at a time. • Solution: Crossbar Switches

  23. Crossbar Switches (cont’d) • A crossbar switch connects every port with every other port—no more bus contention!

  24. Crossbar Dilemma • Problem: If every output port connects to every input port, then as the n number of ports grows, the complexity of the switch grows by at least n2.

  25. Solution: The Knckout Concentrator • The Knockout switch can handle l packets simultaneously, where l < n number of ports. • This is sufficient for most reasonable traffic scenarios.

  26. IU’s Switches IU determines which switch to use by the size of the building and the number of users. Small buildings with less than 20 users usually utilize the HP224 switch. Larger installations, like the residence halls, will employ the HP4000 switches.

  27. Procurve Switch 4000m It has 40 RJ-45 10/100Base-TX ports to connect users. Only has16 MB of ram and an Intel 66mhz processor. This of course is possible because most of the work is done on the actual line cards.

  28. Procurve Switch 4000m The switch has a throughput of 4.67 million packets per second. Latency is less than 10 microseconds Backplane Speed: 3.89 Gbps Address table size: 10,000 entries

  29. Procurve Switch 224m This switch has 24 RJ-45 10Base-T ports and a 10/100Base-TX port to connect to a server or network data center Only 2 MB of ram and a 25Mhz processor, as before most work is done by the cards.

  30. Procurve Switch 224m The other stats are much like the 4000m switch • 4.67 million pps • Latencey <10 microseconds • Backplane Speed: 3.8 Gbps

  31. Sources www.calient.net/presentations/supernet_bowers/sld004.htm http://www.math.tau.ac.il/~alx/courses/lectures.html http://www.hp.com/rnd/products/switches/switch4000/summary.htm http://www.hp.com/rnd/products/switches/switch224-212/summary.htm http://Resnet.indiana.edu Computer Networks, Peterson and Davie, 2000 PMC Sierra, Inc, “A New Architecture for Switch and Router Design,” Dec 22, 1999

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