INF5050 – Protocols and routing in Internet (Friday 15.02.2014)

1. INF5050 – Protocols and routing in Internet (Friday 15.02.2014) Next Generation Routers By KristianSkarseth MadsJohannessen

2. Introduction • What is Routing • Current router technologies • Challenges and issues with today’s technology • Next generation router technologies • CPU technologies, Parallelization and Hardware acceleration • Network processing (NP) • IP route lookup • Traffic Manager & Switch Fabric • Buffering • Fairness • Arbitration • Optics in routers Next Generation Routers

3. B What is routing E H2 F C S H1 A D Next Generation Routers

4. Current (future) Router Technologies (2010-today)[1] • Cisco CRS-3 • Price: From $90,000 U.S. • Up to 322 Tb/s • Each line card: up to 40Gb/s • Maximum power consumption: 7650W Next Generation Routers

5. Challenges and issues with today’s technology • Optical link speed increase higher than Moorse law • Hardware • SRAM: low capacity • DRAM: too slow • CPU Speed • Examples of stages in routing that requires faster hardware: • Lookup tables • Arbitration & Quality of Service (QoS) • Buffer Management • Capacity limitations lead to several smaller switches • Power Consumption • Space requirements • Latency • Infrastructure complexity Next Generation Routers

6. Next generation (today’s) architecture Route Controller Management Controller Line Card 1 CPU Memory Memory Transponder/Transceiver NetworkProcessor TrafficManager Framer Switch Fabric Line Card N CPU Memory Memory Transponder/Transceiver NetworkProcessor TrafficManager Framer Next Generation Routers

7. IP-Lookup • This is where we can gain most speedup in the router. • The use of classes for routing (IPv4) was wastful, we have now moved to Classles Inter Domain Routing (CIDR) • To find the next hop, we search for the most specific match of the destination address in the routing-table.

8. IP-Lookup Algorithms • Caching address scheme • Storing most recent destination addresses and their next-hop information • This scheme can only work if there is sufficient locality in the packet stream. As of today this is not the case and makes this an impractial scheme • Trie based scheme • The routing-table is stored in a tree-like structure • The destination address of a packet is used as a map from left to right to traverse through the tree (trie). When we have gone through the whole address or there is no node at the next path, the algorithm will return the previous node. • Hardware based scheme

9. Caching address scheme • In IPv4 is divided into three main classes so that the routers would only store for the network addresses • Class A • 8 bit network address • Addresses per network 224 (16,777,216) • Class B • 16 bit network address • Addresses per network 216 (65,536) • Class C • 32 bit network address • Addresses per network 28 (256) • To make better use of the address space classless interdomain routing (CIDR) was deployd. This decreases the size of the routing tables.

10. Trie based scheme • 1-B Trie • Worst case lookup O(W), Storage O(NW), Update O(W) • Path-Compressed Trie • Worst case lookup O(W), Storage O(N), Update O(W) • Multibit Trie • Worst case lookup O(W/K), Storage O(2kNW/K), Update O(2kNW/K) • Level Compression Trie (LC-Trie) • Worst case lookup O(W/K), Storage O(2kNW/K), Update O(-)

11. 1-B Trie • 1-B Trie is also referred to as a binary tree, where each node contains of two pointers. The 0-pointer (left pointer) and the 1-pointer (right pointer). • The pathway in the trie represents the bit representation of the prefix address

12. 1-B Trie Bit address 1 0 1 0 1 Temp Next hop P2 P1 Node structure P2 P3 P4 P5

13. Path-Compressed Trie • The path-compressed trie is an improved version of the 1-b structure. It is based on the obervation that some internal nodes of the 1-b trie may have a singel descendant. The number of such nodes can be large when the trie is sparse, which causes the trie to have a high space complexity and large lookup time.

14. Path-Compressed Trie Bit address 1 0 0 1 1 ,,1 Temp next hop P1 1,,2 P2 P2 is returnd since 1011 does not match 1001 10,P2,4 P3 Node structure 1011,P4,5 P5

15. Multibit Trie • Using the 1-b trie structure for the IP route lookups has a drawback in that the number of memory accesses in the worst case could be 32 for IPv4. • The performance of the lookup can be improved by using a multibit trie structure.

16. Multibit Trie Bit address 1 0 0 1 1 A Route Prefix Expansion Example for a 2-B Trie P1 P1 P2 P3 As you can see, this took only one step, and P2 is returnd since there is no node at the ”01 pointer”. P4 P5 P5 Node structure Next Generation Routers

17. Level Compression Trie (LC-Trie) • As we have just said earlier, the path compressed trie is an affective way of compressing a trie when the nodes are sparsely populated. • The LC-Trie is a technique to compress a trie when the nodes are densly pupulated. • The LC-trie combines the path-compression and multibittrie concepts to optimize a given 1-b trie structure. • To save memory space, all the nodes in the LC-trie are stored in a single node array: first the root, then all nodes at the second level, then all the nodes at the third level, and so on. Next Generation Routers

18. Hardware based scheme • DIR-24-8-BASIC • DRAM based scheme • Dram has larger capacity, but slower speed • First 24b of the address are stored in a TBL24 • 99% of prefixes are 24b or shorter • If no match was found, TBLlong is used for the last 8b of the address • SRAM based scheme • SRAM has lower capacity, but higher speed • IP, port and pointer is split in two 16b tables Next Generation Routers

19. Next generation (today’s) architecture Route Controller Management Controller Line Card 1 CPU Memory Memory Transponder/Transceiver NetworkProcessor TrafficManager Framer Switch Fabric Line Card N CPU Memory Memory Transponder/Transceiver NetworkProcessor TrafficManager Framer Next Generation Routers

20. Head of Line blocking Switch Fabric Traffic Manager Memory Traffic Manager Next Generation Routers

21. Head of Line blocking solved with Virtual Queues (VOQ) Traffic Manager Memory Switch Fabric • VOQs are multiple virtual buffers in the same memory Memory Traffic Manager Next Generation Routers

22. Packet Dropping – Tail Drop Traffic Manager Memory Switch Fabric Memory Traffic Manager Next Generation Routers

23. Packet Dropping – Random Early Detection (RED) Traffic Manager Memory • More crowded buffer increases chance of dropping a random packet • Buffer full -> 100% chance of dropping a random packet from the buffer • Reason: Never drop all new incoming packets Memory Traffic Manager Next Generation Routers

24. Packet Dropping – Weigthed REDQoS extension from normal RED • In pure RED it is completely random which packet is dropped • Weigthed RED adds extra QoS by giving packets a weighted value. • The weighted value increases or decreases a packets chance of being dropped, thus adding QoS to the packet dropping stage Next Generation Routers

25. Arbitration - iSLIP If the output arbiters receives more than one request, the nextelement in the round robin schedule with the highest priority is selected to pass.The arbiters send accept or decline messages to all requesters The input arbiters sends a request to the output arbiters, asking if they can send the packet they selected from the previous phase If input arbiters gets more than one request, they select the next to passwith round robin, starting from the highest priority element Finally the linecards can start sending the packets based on the answers they received Nonempty VOQs send request to their input arbiter to send their packets Virtual output queues Input Arbiters Output Arbiters No Yes Yes Yes Next Generation Routers

26. Optics in routers • Signals arrive at the speed of light! • Signals must be converted to electrical signals in the Transponder/ Transceiver • Electrical signals are much slower! • Optical links between line cards and switches exists today • What if we could do all processing in optics?(Optical transistors) Line Card CPU Memory Memory Transponder/Transceiver NetworkProcessor TrafficManager Framer Optical signals Optical signals Next Generation Routers Switch Fabric

27. Next Generation Routers

28. References • [1] Cisco Press Release. Can be found at: http://newsroom.cisco.com/dlls/2010/prod_030910.html?sid=BAC-JsSynd • H. Jonathan Chao, “Next Generation Routers”,  Proceedings of the IEEE, Vol. 90, No. 9, September 2002. • S. Floyd and V. Jacobson, “Random early detection gateways for congestion avoidance,” ACM/IEEE Trans. Networking, vol. 2, pp.397–413, Aug. 1993. Next Generation Routers