Stave-09 Intro and News Status of HSIO, BCC, EOS

1. Stave-09 Intro and NewsStatus of HSIO, BCC, EOS Carl Haber Lawrence Berkeley National Lab 11-Dec-2009

2. Stave Infrastructure at CERN • A Stave-09 project goal is to establish an assembly and test effort at CERN (as of the June 2008 review) • This requires certain physical infrastructure and manpower be in-place • The rough time scale is mid-2010 • Some of this may be the basis of the eventual assembly and integration project in the later production phase.

3. continued • The project has been presented with two facility “offers” • B186 is an existing silicon lab with space, facilities, clean, w/b. • It lacks metrology and cannot be permanent for us • B180 is empty but could become a full long term clean lab with some investment • Neither B186 nor B180 really meet all our needs in the short term

4. continued • The stave project at CERN needs a stable team and leadership on-site • This aspect has not converged at present, for a variety of reasons…. The LHC is running, etc etc • We remain optimistic on this front for the mid-2010 period • None-the-less strong efforts and teams are in-place at a number of external institutes.

5. continued • Following the June 2009 BNL meeting we organized the project into 2 main phases • Stavelets • Full Stave-2009 • The main stavelet work will occur at the external institutes and will address most of the key assembly and test issues we expect to encounter with Stave-2009

6. continued • Because of the time-scales and healthy stavelet efforts we believe there is sufficient flexibility in the project to ramp the CERN based aspect up as appropriate and practical as the year progresses. • We can support various steps with effort at the institutes if needed, when the time comes. • We remain committed to developing the Stave-2009 assembly and test at CERN and recognize this as a key step in establishing needed infrastructure for later production efforts

7. HSIO • HSIO working week at UCL Dec 14-18 • Attending: Law (LBL), Phillips, Gallup, Warren, Hommels • Goal is merge interface, drivers, hardware histogramming, and host-analysis system • Big push for a deployable system • New version of interface card for Stave-09 is in layout • Need an accurate count of systems requested – please contact chhaber@lbl.gov

8. BCC • See talk of Ashley – BCC has be operated with ABCnext hybrid • Still struggling with testing of multiple BCC in Berkeley, see a significant number of parts which do not respond properly to the clock multiplier command in-spite of “fix” • ~24 tested, about 60% pass this but mostly from the first batch of 12 (!!) • 12 new BCC test boards are in preparation, will see if statistics improve…. • New BCC submission upcoming

9. EOS • EOS card is in layout • Have increased the width to 120 mm to accommodate connector field • In concert with Interface card • 2 versions – for stave (wirebonded) and with connector (old 98 mm layout)

10. Header to Pwr supply, external control 5V 70V To FPGA 1wire data Gnd SPI data out To FPGA SPI clk SPI com Header to run this stuff Standalone/test BUS Cable interface EOS