1 / 6

Efficient ηT Pairing Calculation Algorithm and FPGA Implementation for Characteristic Three Curves

This research presents a novel ηT pairing algorithm that eliminates cube root operations, enhancing efficiency compared to traditional Tate pairing techniques on supersingular elliptic curves. Our implementation targets low-cost FPGA boards, comparable to entry-level desktop PCs, featuring a design based on an improved multiplication algorithm with nine parallel multipliers. This advancement offers a robust hardware solution for cryptographic applications. Detailed results and methodology can be found in our publication: J-L. Beuchat et al., "An Algorithm for ηT Pairing Calculation in Characteristic Three and its Hardware Implementation," Cryptology ePrint Archive, 2006.

valentine-perkins
Download Presentation

Efficient ηT Pairing Calculation Algorithm and FPGA Implementation for Characteristic Three Curves

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. An Algorithm for ηＴPairing Calculation in Characteristic Three and its Hardware Implementation Jean-Luc Beuchat, Masaaki Shirase, Tsuyoshi Takagi, and Eiji Okamoto University of Tsukuba Future University-Hakodate

  2. Context and Research • ηT pairing is • a pairing on supersingular elliptic curves, • more efficient than Tate pairing. • but its algorithm has cube root operations. • We research as follows : • New algorithm without cube root is proposed. • It is implemented on (low-cost) FPGA. • Design board whose price is an entry level desktop PC.

  3. ηT Pairing Algorithm

  4. FPGA Implementation • Multiplier is based on an improvement of analgorithm proposed by Song and Parhi. • It has 9 parallel multipliers.

  5. Implementation Result

  6. See J-L.Beuchat, M.Shirase, T.Takagi, and E.Okamoto,　“An Algorithm for ηＴ　Pairing Calculation in Characteristic Three and its Hardware Implementation‘’Cryptology ePrint Archive, Report 2006/327, 2006. for details. Thank You!

More Related