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Wing LDA - PowerPoint PPT Presentation

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Wing LDA

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  1. André Welker Lennart Adam, Bruno Bauss, Volker Büscher, Reinhold Degele, Karl Heinz Geib, Sascha Krause, Yong Liu, Lucia Masetti, Phi Chau, Uli Schäfer, Rouven Spreckels, Stefan Tapprogge, Rainer Wanke Wing LDA CALICE Collaboration Meeting DESY Hamburg, 21. March 2013

  2. off-detector-electronic on-detector-electronic control, trigger, clock, busy Ethernet beam control Read-out-chain clock- andcontrol-card (CCC) fan-out more LDAs control clock trigger HBU analog digital data-aggregator (LDA) detectorinterface ASIC SiPM data busy DAQ PC Ethernet HBU analog digital detectorinterface ASIC SiPM André Welker, CALICE Collaboration Meeting , DESY, 21. March 2013 2

  3. off-detector-electronic on-detector-electronic control, trigger, clock, busy Ethernet beam control Read-out-chain clock- andcontrol-card (CCC) fan-out more LDAs control clock trigger HBU analog digital data-aggregator (LDA) detectorinterface ASIC SiPM data busy DAQ PC Ethernet HBU analog digital detectorinterface ASIC SiPM André Welker, CALICE Collaboration Meeting , DESY, 21. March 2013 2

  4. LDA integrated in the 10x10cm cableshaft: • challenges: • problems: • LDA outside ofthedetector • 96 cables in thecableshaft • solution/problem: • 110 cm PCB • timedelay • between • eachlayer • (upto 5ns) • solution: • on-board-electronic • regulatestiming • differences HCAL- /TPC-cabelshaftwithcoolingpipes Position ofthe LDA 110cm ECAL-cableshaft 10cm André Welker, CALICE Collaboration Meeting , DESY, 21. March 2013 3

  5. LDA integrated in the 10x10cm cableshaft: • challenges: • problems: • Pitch betweenthe 48 layersdepends on • (18/23 mm for W/Fe) • solution: • Smallestpossible HDMI microconnector • Nowonly • - One Ethernet cable • - Onecontrolcable • in thedetector HCAL- /TPC-cabelshaftwithcoolingpipes Position ofthe LDA Ethernet-Uplink Controlcable CCC 110cm ECAL-cableshaft 10cm André Welker, CALICE Collaboration Meeting , DESY, 21. March 2013 3

  6. ActiveandPassive • LDA consists of 4 parts: • Three passive PCBs: • The 96 connectors are on these PCBs. • One active PCB: • it is a daughter module for tests and fast repairs. Mechanicandflexibility: LDA with rigid-flex connections: centralmodule leftwing rightwing rigid-flexconnection André Welker, CALICE Collaboration Meeting , DESY, 21. March 2013 4

  7. oldideas The first PCB: 1. Wing with 17 HDMI-connectors routed: Wing-LDA 450mm André Welker, CALICE Collaboration Meeting, Cambridge, Sep. 18, 2012 5

  8. oldideas The second PCB: 2. CenterPCB with 12 HDMI-connectors: Wing-LDA DATA/BUSY DATA/BUSY TRIG/CLK/DATA TRIG/CLK/DATA 400mm André Welker, CALICE Collaboration Meeting, Cambridge, Sep. 18, 2012 6

  9. Passive PCB: 1. Wing with 32 HDMI connectors: LDA Layout 99mm 367,5mm André Welker, CALICE Collaboration Meeting , DESY, 21. March 2013 7

  10. Passive PCB: 2. Central module with 32 HDMI connectors: LDA Layout 99mm 365mm André Welker, CALICE Collaboration Meeting , DESY, 21. March 2013 8

  11. LDA Layout Active PCB: 3. Daughter module with 4 FPGAs and a Mars module: FPGA FPGA FPGA FPGA RJ45 80mm MARS SD HDMI-CCC 280mm André Welker, CALICE Collaboration Meeting , DESY, 21. March 2013 9

  12. LDA Active PCB: 3. FPGA daughter module FPGA FPGA FPGA FPGA Mars-ZX3 Zynq • Peculiarity: • Manages 1100 signals • andsendsthemovertheEthernet • Hasa Zynqprocessorwho • hasimplemented an Arm9 • dual core (with Linux) • andone FPGA • Same moduleas CCC Ethernet CCC-Connector 280mm Legend: Data Data/BUSY Control/Trigger/Clock BUSY André Welker, CALICE Collaboration Meeting , DESY, 21. March 2013 10

  13. May 2013 Testbeam (DESY) - Next testbeamwith 8 layers atthe end ofmay control busy beam control control data 2 GeV beam clock- and controlcard (CCC) DAQ PC André Welker, CALICE Collaboration Meeting , DESY, 21. March 2013 11

  14. LDA collects parallel datafrom 96 detectorlayersandleadstheclocktoeachofthemwithout a timingdelay • 80% ofthe LDA design isfinished • Orderthe PCBs in 1 week • Firmware will befinished in 1 month • Software isfinished • ReadytoreadouttwofullILD detectorsegmentswith 48layerseach LDA Status André Welker, CALICE Collaboration Meeting , DESY, 21. March 2013 12

  15. Steps: Read-out dataand send slowcontroldatafromthe HBU layersasbeforeover USB, but integratethe CCC forclock, triggerandbusy signals Read-out databy USB but send slowcontroldata, clock, busy, triggerovertheCCC Integratethe LDA fordataread-out insteadofthe USB, without interference from us in the regular data taking Firmware andsoftware will bewrittenbyus, so wedon‘tdisturbthemanpower on the DIF side Integration of CCC and LDA André Welker, CALICE Collaboration Meeting , DESY, 21. March 2013 13

  16. Thank you for your attention! André Welker, 77. DPG-Frühjahrstagung, Dresden, 04. März 2013