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Gates and Logic: From switches to Transistors , Logic Gates and Logic Circuits. Prof. Kavita Bala and Prof. Hakim Weatherspoon CS 3410, Spring 2014 Computer Science Cornell University. See: P&H Appendix B.2 and B.3 (Also, see B.1 ) . Goals for Today.
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Gates and Logic:From switches to Transistors, Logic Gates and Logic Circuits
Prof. Kavita Bala and Prof. Hakim Weatherspoon
CS 3410, Spring 2014
Computer Science
Cornell University
See: P&H Appendix B.2 and B.3 (Also, see B.1)
The Bombe used to break the German
Enigma machine during World War II
+
Truth Table
A

B
+
Truth Table
A

B
+
A

B
+
Truth Table
A

B
+
A

B
Truth Table
A

OR
B
A

AND
B
Truth Table
A

OR
0 = OFF
1 = ON
B
A

AND
B
A
OR
B
George Boole,(18151864)
A
AND
B
AND, OR,NOT,
NAND (not AND), NOR (not OR), XOR, and XNOR (not XOR) [later]
A
A
B
A
B
AND, OR,NOT,
NAND (not AND), NOR (not OR), XOR, and XNOR (not XOR) [later]
A
A
B
A
B
AND, OR,NOT,
NAND (not AND), NOR (not OR), XOR, and XNOR (not XOR) [later]
A
NAND:
A
A
B
B
NOR:
A
A
B
B
a
b
Out
a
b
Out
a
Out
b
a
Out
d
b
a
Out
d
b
NOT:
AND:
OR:
XOR:
.
A
A
B
A
B
A
B
NOT:
AND:
OR:
XOR:
.
A
NAND:
A
A
B
B
NOR:
A
A
B
B
XNOR:
A
A
B
B
NAND:
NOR:
XNOR:
a + 0 =
a + 1 =
a + ā =
a + 0 =
a + 1 =
a + ā =
a
1
1
0
a
0
a
b
a
b
=
=
a + a b =
a(b+c) =
=
=
=
a + a b =
a(b+c) =
=
A
↔
∙
a
ab + ac
A
B
B
A
↔
B
A
B
a + 0 =
a + 1 =
a + ā =
a 0 =
a 1 =
a ā =
=
=
a + a b =
a(b+c) =
=
a
1
1
0
a
0
Show that the Logic equations
below are equivalent.
(a+b)(a+c)= a + bc
(a+b)(a+c)=
a
1
1
0
a
0
a + 0 =
a + 1 =
a + ā =
a 0 =
a 1 =
a ā =
=
=
a + a b =
a(b+c) =
=
Show that the Logic equations
below are equivalent.
(a+b)(a+c)= a + bc
(a+b)(a+c)= aa + ab + ac + bc
= a + a(b+c) + bc
= a(1 + (b+c)) + bc
= a + bc
a
b
c
out
corollary: anycombinational circuit can be implemented in two levels of logic (ignoring inverters)
How does one find the most efficient equation?
For large circuits
ab
c
00 01 11 10
0
1
ab
c
00 01 11 10
0
1
ab
c
00 01 11 10
0
1
ab
c
00 01 11 10
0
1
ab
c
00 01 11 10
0
1
ab
c
00 01 11 10
0
1
ab
c
00 01 11 10
0
1
ab
cd
00 01 11 10
00
01
11
10
ab
cd
00 01 11 10
00
01
11
10
ab
cd
00 01 11 10
00
01
11
10
ab
cd
00 01 11 10
00
01
11
10
ab
cd
00 01 11 10
00
01
11
10
ab
cd
00 01 11 10
00
01
11
10
ab
cd
00 01 11 10
00
01
11
10
ab
cd
00 01 11 10
00
01
11
10
a
b
d
a
b
d
a
b
d
ab
d
00 01 11 10
0
1
a
b
d
ab
d
00 01 11 10
0
1
a
b
d
ab
d
00 01 11 10
0
1
a
out
d
b
T2:55 – 4:10pmCarpenter Hall 104 (Blue Room)
http://pollinghelp.cit.cornell.edu/iclickergo/#students
VS= 0 V
VD
VG
VG
VG = VS
VG = VS
VG = 0 V
VG = 0 V
VS = 0 V
VD
VS= 0 V
VD
VG
VG
VG = 1
VG = 1
VG = 0
VG = 0
VS = 0 V
VD
Vsupply (aka logic 1)
0
1
in
out
out
in
(ground is logic 0)
Truth table
Vsupply
Vsupply (aka logic 1)
1
0
in
out
out
in
(ground is logic 0)
Truth table
Vsupply
Vsupply (aka logic 1)
Out = 1
Out = 0
A = 0
A = 1
in
out
out
in
(ground is logic 0)
Truth table
Vsupply
Vsupply
1
1
A
B
0
a
out
out
1
b
B
1
A
Vsupply
0
A
a
0
B
out
b
1
out
0
0
B
A
a
a
b
a
b
AT&T Bell Labs in 1947
http://techguru3d.com/4thgenintelhaswellprocessorsarchitectureandlineup/
Vdd
a
out
in
d
out
b
Vss
a
d
out
in
out
b