1 / 19

Digital Integrated Circuits - week six -

Digital Integrated Circuits - week six -. Gheorghe M. Ş tefan http://arh.pub.ro/gstefan/ - 2014 -. Non-recursive definition. Size = ? Depth = ? Fan-out = ?. Application: computes min-terms. Example of using DCDs as CLC. Demultiplexors.

donkor
Download Presentation

Digital Integrated Circuits - week six -

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript


  1. Digital Integrated Circuits- week six - Gheorghe M. Ştefan http://arh.pub.ro/gstefan/ - 2014 -

  2. Non-recursive definition Size = ? Depth = ? Fan-out = ? Digital Integrated Circuits - week five

  3. Application: computes min-terms Digital Integrated Circuits - week five

  4. Example of using DCDs as CLC Digital Integrated Circuits - week five

  5. Demultiplexors The signal enable is demultiplexed (distributed, scattered) in m = 2nplaces according to the code xn-1, xn-2, … x0 Digital Integrated Circuits - week five

  6. Formal definition The circuit is simple The Verilog description is synthesisable Size = ? Depth = ? Complexity = ? Digital Integrated Circuits - week five

  7. Recursive definition Size = ? Depth = ? Fan=out = ? Complexity = ? Digital Integrated Circuits - week five

  8. Multiplexors Gathers data form m=2n places according to the selection code xn-1, xn-2, … x0 Size = ? Depth = ? Digital Integrated Circuits - week five

  9. Formal definition The code is ready for synthesis Complexity = ? Digital Integrated Circuits - week five

  10. Recursive definition Digital Integrated Circuits - week five

  11. Recursive definition (cont) Digital Integrated Circuits - week five

  12. Expanding the input size Digital Integrated Circuits - week five

  13. Application: logic function implementation Digital Integrated Circuits - week five

  14. Increment EINC: half-adder Good news: Size  O(n) Bad news: Depth  O(n) Digital Integrated Circuits - week five

  15. Adder Good news: Size  O(n) Bad news: Depth  O(n) Digital Integrated Circuits - week five

  16. Adder: behavioral description Digital Integrated Circuits - week five

  17. Carry-Look-Ahead Bad news: Size  O(n3) Good news: Depth  O(log n) Digital Integrated Circuits - week five

  18. Arithmetic & Logic Unit (ALU) Digital Integrated Circuits - week five

  19. Home work 6 Problema 1: Folositi metoda descrisa in slide-ul 4 pentru a realiza un scazator complet de un bit (tableul de adevar l-ati definit in prima tema de casa) Problema 2: Folositi metoda descrisa in slide-ul 13 si proiectati un circuit care semnaleaza cand pe intrare majoritea bitilor au valoarea 1. Problema 3: Desenati cu porti AND si OR un circuit Carry-Look-Ahead pentru un sumator de numere de 4 biti. Care este size-ul si depth-ul circuitului rezultat? Digital Integrated Circuits - week five

More Related