foundry services mosis as a model n.
Download
Skip this Video
Download Presentation
Foundry Services: MOSIS as a model

Loading in 2 Seconds...

play fullscreen
1 / 20

Foundry Services: MOSIS as a model - PowerPoint PPT Presentation


  • 118 Views
  • Uploaded on

Stanford. HP. MIT. Startup X. UCB. users. Information. vendors. Chips. Mask maker. Dicing and packaging. Orbit 2um. HP 0.5um. Foundry Services: MOSIS as a model. MOSIS: MOS implementation service, ISI, 1980. MOSIS. $$$$$. Foundry Services and Standard Processes.

loader
I am the owner, or an agent authorized to act on behalf of the owner, of the copyrighted work described.
capcha
Download Presentation

PowerPoint Slideshow about 'Foundry Services: MOSIS as a model' - verda


Download Now An Image/Link below is provided (as is) to download presentation

Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author.While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server.


- - - - - - - - - - - - - - - - - - - - - - - - - - E N D - - - - - - - - - - - - - - - - - - - - - - - - - -
Presentation Transcript
foundry services mosis as a model

Stanford

HP

MIT

Startup X

UCB

users

Information

vendors

Chips

Mask

maker

Dicing and

packaging

Orbit

2um

HP

0.5um

Foundry Services: MOSIS as a model
  • MOSIS: MOS implementation service, ISI, 1980.

MOSIS

$$$$$

foundry services and standard processes
Foundry Services and Standard Processes
  • MCNC/MUMPS (now by Cronos)
    • 3 level poly, no electronics
    • started in 1992, now 6 runs per year
  • LIGAMUMPS
    • single level metal, no electronics
  • Sandia
    • 5 level poly, no electronics
    • 1 level poly w/ quality CMOS
  • CMOS + post-processing
    • EDP, TMAH, XeF2 (Parameswaran)
    • Plasma (Fedder)
design rules
Design “Rules”
  • Guidelines for communication between fab people and design people
  • Generally not enforced
    • MUMPS, 2um CMOS: no
    • HP sub-micron CMOS: yes
  • Often desireable to violate
    • MUMPS: process exploration, new devices, some previous design rule violations are now encouraged
    • CMOS: Parameswaran, Fedder style MEMS depends on design rule violations
design rules1

Line width

... and spacing

Design Rules
  • Typically due to
    • lithographic resolution limits
    • lithographic alignment repeatability
    • etching capabilities
  • Most important: Line/space
    • due to lithography or etching
    • varies from layer to layer
    • varies near topography
    • no guarantee of dimensions: the lines will exist and be distinct.
mcnc mumps design rules
MCNC/MUMPS Design Rules

Rules for line/space on all mask layers.

mcnc mumps design rules2
MCNC/MUMPS Design Rules

Examples for POLY2 from

mems.mcnc.org/smumps/mrules

breaking the rules
Breaking the Rules
  • Sub-minimum lithography
    • risky, but often successful, especially in planar areas
  • Breaching nitride (substrate contacts and opens)
    • Stack anchor1 and poly1-poly2-via
    • don’t include poly1
    • include poly2 for electrical contact to substrate, or remove to expose bare substrate
  • Double-thick poly
    • continuous sheet of poly1 enclosed in poly1-poly2-via
    • poly2 structures on top
mcnc mumps access
MCNC/MUMPS access
  • Cost is $3,500 per submission
    • 1cm2 die area per submission
    • 15 identical dice returned (~$2/mm2)
  • Files are submitted by anonymous ftp
  • Dicing, bonding, HF release are all available for additional cost
  • Parameterized and static design cells are free online (CaMEL)
  • Design services are available for additional cost
mcnc mumps process specs
MCNC/MUMPS process specs

Polys are compressive, nitride

and metal (Cr/Au) are tensile.

mcnc ligamumps design rules
MCNC/LIGAMUMPS Design Rules

A, W, L must be greater than or equal to 20.0 microns.

Photoresist aspect ratio, L/W, must be less than or equal to 10.