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Hardware Group Status PowerPoint Presentation
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Hardware Group Status

Hardware Group Status

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Hardware Group Status

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  1. Hardware Group Status January 7th, 2003 Karl Triebes

  2. New Enterprise Platforms Foundry Networks Proprietary and Confidential

  3. Enterprise Product Status Foundry Networks Proprietary and Confidential

  4. Service Provider HW Status Foundry Networks Proprietary and Confidential

  5. Enterprise HW - Mucho Grande • Completed demonstration of L2 switching code and HW on 12/31 • 2 blades + Management + Switch fabric • Same demo will be used for • Goal this week is to run full mesh of all 8 blades • 1 port on 8 blades run simultaneously before Jan 1 • 32 ports on all 8 blades • Production version chassis in house • ASIC respins • Metal-only respin – changes to die • Cost = $110K per ASIC ($220K total for both) • SXB & IBT • Tape out end of January • ASICs in house in mid-March • Will not affect integration activities Foundry Networks Proprietary and Confidential

  6. Issues • JICPAC – Evaluating whether PLL instability in IGC-300/400 is the culprit • Potential cold susceptibility with IGC-300 blades (May be CAM related as well) • PLL bypass rework does appear to eliminate problem in preliminary tests • IGC-400 blades do not appear to experience this failure • Cerner – 3 problems • Crashed management blade – SW believes this to be a HW failure. TAC attempting to reproduce. • Buffer depletion on 48E blade – Blade received last week – TAC attempting to reproduce • periodic packet corruption on 48T blade • Eagle Alliance • Packet corruption in 15K with worst case patterns – appears to be 15K related • M4 Crashes (Cable and Wireless) • Conference call held with IBM today – failed chip passes verification but fails ‘functional’ test at low temperature in a Apple computer • Resolution from IBM will be slow • May be seeing related failures at other customers(Cerner), however, need to get cards back in house Foundry Networks Proprietary and Confidential

  7. Issues Continued • Yield issue with BXGMR4, B8G-A, BXG modules • Associated with mixed speed grade flag RAMs – Samsung + Micron • AVL will be changed to standardize on Micron • Other items • Need to get CM on line with 15K testing • Analyzing whether speed grade binning of SMCs can help improve timing margins in 15K environment • Received timing models from TI for all SMCs – negative hold time margins > 5 ns in some cases • Adding in trace length delays from cards to get composite timing model • This will help us develop a means to ensure that timing margins are met under all cases Foundry Networks Proprietary and Confidential

  8. Personnel • Open requisitions • HW Manager – Service Provider HW (new) • 3 board level designers (new) • 1 diagnostic engineer (replacement for Frank McMurray) Foundry Networks Proprietary and Confidential