VCC Hardware Production Status - PowerPoint PPT Presentation

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VCC Hardware Production Status

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  1. VCC Hardware Production Status Production VCC Locations and Dispositions • Firmware compile issues delayed testing and burn-in. • Last 15 boards passed pre-burn-in testing • Post burn-in testing in progress.

  2. VME Crate Controller Issues • User reported firmware issues are resolved by combination of: • Replacing 1.5V power inductor with short (Vcore tolerance issue). • Installing service pack 2 and recompiling with ISE 8.202i. • Saving correct user configuration settings for power up in Flash mem. • Resolving driver conflicts with multiple NICs. • However new issues have come up in new compiles (with no logic changes) • DCM’s failing to lock or loosing lock before power-on startup finishes. • Internal FPGA timing issues with a few (not all) boards even though the compile passed all timing constraints (like missing data or double data on some VME reads).

  3. VCC: Addressing the Issues • DCM issues have been addressed by reconfiguring the clocks and modifying the startup procedure. • Timing issues have been addressed by slowing down the clock. • Main clock is 16ns. • VME interface front-end clock is 4ns. • Changed the 4ns clock to 8ns. • Changing the clock affects VME timing parameters • Implementation of VME rules was based on a 4ns clock. • Rules that are based on minimum times will be OK (just lengthed response times). • Other rules (such as “release within …”) potentially could be violated with the 8ns clock. • The exact implementation details need to be checked and/or adjusted.

  4. VCC: Latest Revision • Revision 3.69: • Uses 8ns VME interface clock. • More robust DCM monitoring and startup. • Known problems in previous revision are not present in 3.69. • Available for downloading on the controller web page • http://www.physics.ohio-state.edu/~cms/GbE_Ctrl • Not extensively tested yet, but very promising.

  5. VCC: Outlook • Hardware Modifications Needed. • Replace inductor for 1.5V regulator with short. • Add 10 uF Tant. bypass caps for oscillators (these were omitted during original board assembly). • Firmware Development Work. • Investigate consequences of 8ns clock on VME rules. • Adapt the implementation to 8ns clock. • Test and verify proper timing. • Distribute a reliable firmware revision. • Proceed with firmware development. • Packet acknowledgements. • Ethernet firmware downloading.