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A 60-GHz CMOS Direct-Conversion Wireless Transceiver

Ryo Minami Advisor: Kenichi Okada Co-Advisor: Akira Matsuzawa Tokyo Institute of Technology, Japan . A 60-GHz CMOS Direct-Conversion Wireless Transceiver. Outline. Motivation RF Front-end 60GHz injection-locked oscillator(ILO) with 20GHz phase lock loop(PLL) 60GHz transmitter(Tx)

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A 60-GHz CMOS Direct-Conversion Wireless Transceiver

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  1. Ryo Minami Advisor: Kenichi Okada Co-Advisor: Akira Matsuzawa Tokyo Institute of Technology, Japan A 60-GHz CMOS Direct-Conversion Wireless Transceiver

  2. Outline • Motivation • RF Front-end • 60GHz injection-locked oscillator(ILO) with 20GHz phase lock loop(PLL) • 60GHz transmitter(Tx) • 60GHz receiver(Rx) • Measurement and Comparison • Conclusion

  3. Outline • Motivation • RF Front-end • 60GHz injection-locked oscillator(ILO) with 20GHz phase lock loop(PLL) • 60GHz transmitter(Tx) • 60GHz receiver(Rx) • Measurement and Comparison • Conclusion

  4. Motivation • 60GHz CMOS direct-conversion transceiver for multi-Gbps wireless communication IEEE 802.11ad specification • 57.24GHz- 65.88GHz • 2.16GHz/ch x 4channels • QPSK  3.5Gbps/ch • 16QAM  7Gbps/ch

  5. Challenges for mmW Transceivers • Target • a low-power direct-conversion RF front-end with 4-channel coverage • very low phase noise • Design complexity • 2.4GHz vs 60GHz (25x) • 20MHz-BW vs 2.16GHz-BW (108x)

  6. Phase Noise Requirement For 16QAM direct-conversion, -90dBc/Hz@60GHz is required. D Required CNR [dB] 16QAM AM-AM of PA QPSK Phase noise [dBc/Hz] @ 1MHz offset

  7. LO Topologies 1 • 60GHz QVCO[1] • Low Q for capacitors • 30GHz push-push VCO[2] • 2nd harmonic • 90 degree hybrid Poor Phase Noise 90 degree hybrid • I/Q mismatch [1] K. Scheir, et al., ISSCC 2009 [2] C. Marcu, et al., ISSCC 2009

  8. Proposed Topology • 20GHz PLL + 60GHz Quadrature Injection Locked Oscillator • Good tradeoff between phase noise & tuning range • Target : 20dB improvement of phase noise

  9. Outline • Motivation • RF Front-end • 60GHz injection-locked oscillator(ILO) with 20GHz phase lock loop(PLL) • 60GHz transmitter(Tx) • 60GHz receiver(Rx) • Measurement and Comparison • Conclusion

  10. Block Diagram • Tx : 4-stage PA, Active mixer, • Rx : 4-stage LNA, Passive mixer • LO : 60GHz ILO, 20GHz PLL

  11. 60GHz Quadrature LO 4 CML (27,28,29,30) 5 36MHz ref. 20GHz PLL 60GHz QILO PFD CP LPF 19.44GHz 20.16GHz 20.88GHz 21.60GHz Q I 58.32GHz 60.48GHz 62.64GHz 64.80GHz • Wide frequency tuning range • Phase noise improvement by injection locking

  12. Quadrature Injection Locked Osc. 20GHz 20GHz • 60GHz QILO works as a tripler with 20GHz PLL. • Full 4-channel coverage is realized with < -95dBc/Hz@1MHz-offset.

  13. Phase noise -95dBc/Hz@1MHz-offset has been realized in all channels. Ch1: 58.32[GHz] Ch2: 60.48[GHz] Ch3: 62.64[GHz] Ch4: 64.80[GHz]

  14. Performance comparison(60GHz PLL) [1] K. Scheir, et al., ISSCC 2009 [2] C. Marcu, et al., ISSCC 2009

  15. Tx Blocks 4-stage PA MIM TL to antenna Up-conversion mixer from BB I/Q capacitive cross-coupling [3] from LO [3] W. Chan, et al., JSSC 2008

  16. Rx Blocks 4-stage CS-CS LNA ESD protection from antenna 1mm x40 2mm x20 2mm x20 W=1mm x40 Down-conversion mixer from LO Parallel-line trans. to BB I/Q

  17. Outline • Motivation • RF Front-end • 60GHz injection-locked oscillator(ILO) with 20GHz phase lock loop(PLL) • 60GHz transmitter(Tx) • 60GHz receiver(Rx) • Measurement and Comparison • Conclusion

  18. Die Photo LNA 65nm CMOS Tx:1.96mm2 Rx:1.77mm2 PLL:1.37mm2 Logic:0.38mm2

  19. RF Measurement Setup with VSA 89600 DC supply Rx I/Q output (Rx) 6-dBi antenna I/Q input (Tx) Tx 16.3mm x 14.4mm DC supply [4] R. Suga, et al., EuMC 2011

  20. 7.0Gb/s 16QAM (max 10Gb/s) *The roll-off factor is 0.25. The bandwidth is 2.16GHz except for Max rate. **EVM through Tx and Rx boards. ***Maximum distance within a BER of 10-3. The 6-dBi antenna in the package is used.

  21. Performance Comparison [5] V. Vidojkovic,et al., ISSCC 2012 [6] A. Siligaris, et al., ISSCC 2011 [7] S. Emami,et al., ISSCC 2011

  22. Performance Comparison QPSK+16QAM Tokyo Tech all oscillators inc. QPSK+16QAM 16QAM Univ. of Toronto IMEC SiBeam, CEA-LETI UCB NEC OOK FSK OOK Toshiba

  23. Outline • Motivation • RF Front-end • 60GHz injection-locked oscillator(ILO) with 20GHz phase lock loop(PLL) • 60GHz transmitter(Tx) • 60GHz receiver(Rx) • Measurement and Comparison • Conclusion

  24. Summary and Conclusion • A 60-GHz direct-conversion wireless transceiver is implemented using CMOS 65nm process. • Excellent phase noise has been realized in full 4-channels. • The first complete transceiver covering full 4 channels with 16QAM. • Max 10Gbps data rate has been realized. • A high-speed low-power mmW transceiver has been realized.

  25. Thank you for your attention.

  26. Backup slides

  27. 60GHz Quadrature LO Scenario • 60GHz quadrature PLL • Phase noise degradation e.g.-75dBc/Hz@1MHz-offset at 60GHz [1] • 60GHz PLL with 90o hybrid [2] • I/Q mismatch • 60GHz quadrature ILO with 20GHz PLL[This work] • ILO: Injection-locked oscillator • Very wide tuning • Excellent phase noise [1] K. Scheir, et al., ISSCC 2009 [2] C. Marcu, et al., ISSCC 2009

  28. Schematic of QILO • I-Q coupling with tail transistor • Half side injection varactor

  29. back-to-backlayout • I-Q coupling path • coventional:40umthis work:8um • reduction of parasitic component • Low I-Q mismatch 85um 180um Die photo of QILO Schematic

  30. Layout of ILO

  31. Injection Locked Oscillator(ILO) Pulling of VCOs Injection Lock Free-run: 60.1GHz→Locked: 60GHz n=1,2,3… Phase noise is determined by following equation[12]. [12] X. Zhang, TMTT 1992

  32. Measured Model MIM Transmission Line • De-coupling use • Modeling accuracy • Avoiding self-resonance of parallel-plate capacitors MIM capacitor MIM transmission line Z0 [Ohm] 50W transmission line Frequency [GHz] T. Suzuki, et al., ISSCC 2008

  33. RF Performance Summary

  34. Measured Rx SNR 16QAM(17dB) QPSK(10dB)

  35. Link Budget

  36. Mixer Layout (Core) • Mixer core excluding intersection • LO line and RF line cross in matching network • Mixer core including intersection • bad symmetrical property RF+ RF+ LO+ LO- LO+ Asymmetric core Symmetric core LO- RF- RF-

  37. Symmetric Core Layout • Symmetric core needs crossed and complicated matching network. RF+ IF+ IF- RF- LO- LO+

  38. Asymmetric Core Layout • Asymmetric core can realize simple matching network. IF+ IF- RF+ LO+ LO- RF-

  39. I/Q Mismatch by Mixer Layout • Sideband Rejection Ratio (SRR)

  40. Performance Comparison [5] V. Vidojkovic,et al., ISSCC 2012 [6] A. Siligaris, et al., ISSCC 2011 [7] S. Emami,et al., ISSCC 2011

  41. Performance Comparison [5] V. Vidojkovic,et al., ISSCC 2012 [6] A. Siligaris, et al., ISSCC 2011 [7] S. Emami,et al., ISSCC 2011

  42. Performance Comparison [5] V. Vidojkovic,et al., ISSCC 2012 [6] A. Siligaris, et al., ISSCC 2011 [7] S. Emami,et al., ISSCC 2011

  43. Challenges for 60GHz Transceivers • Direct-conversion full CMOS integration • 16QAM/8PSK/QPSK/BPSK support for IEEE802.15.3c, WiGig, Wireless HD, etc. • 60GHz quadrature LO • Low phase noise for 16QAM • Wide frequency tuning (58-to-65GHz) • I/Q phase balance • 60GHz LNA • Low NF & High linearity • Wide bandwidth (gain flatness) • 60GHz PA • 10dBm output • High PAE (>10%)

  44. Injection-LockedOscillator Previous work [3] This work 20GHz 20GHz PPF Dq I Q I Q 3Dq 60GHz 60GHz I/Q mismatch Single-side injection - Small I/Q mismatch - The same locking range PPF:polyphase filter [3] W. Chan, el al., ISSCC 2008

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