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Optimal Diamond and Silicon Configuration for Increased Efficiency

Detailed analysis and comparison of layout options for diamond and silicon components to enhance performance and achieve higher efficiency in a specialized group meeting. Find the ideal configuration with relevant adjustments and specifications.

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Optimal Diamond and Silicon Configuration for Increased Efficiency

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  1. Si & Si/DiamondOptionsAcceptance on BsDsK S. Blusk Group Meeting Mar 31, 2010

  2. Y vs X of Hits (Silicon Only) A B Innermost edge of Si at 7 mm Innermost pixel at 7.5 mm • Start with no gaps • Add 1.1 mm gap btwntwo 6-chip sections • Add 1.1 mm vert. gap btwn left & right half • Increase vertical gapto 3.5 mm C D

  3. Acceptance Definition

  4. Acceptance / Pixel options

  5. Diamond Layout B C • Start with no gaps,hole size 7.5 mm (not shown) • Add 0.6 mm gap btwnSi & Diamond • Add 1.1 mm gap btwn6-chip sections • Add 1.1 mm vert. gap btwn left & right half • Decrease hole sizefrom 7.5 mm  7.0 mm E D

  6. Sil/Diamond Options No gap between Si & Diamond (for comparison) Si/Di gap reduces 4-track eff by ~1.0-1.5% Clearly win back with smaller inner hole size

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