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DBE Implementation for VLBA

DBE Implementation for VLBA. Keith Morris & Matt Luce. CASPER2010 August 18 th , 2010. DBE Contributors. Haystack: Alan Hinton, Arthur Niell, Shep Doeleman, Mikael Taveniku, Christopher Beaudoin, Chester Ruszczyk, Russ McWhirter NRAO:

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DBE Implementation for VLBA

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  1. DBE Implementation for VLBA • Keith Morris & Matt Luce • CASPER2010 • August 18th, 2010

  2. DBE Contributors • Haystack: • Alan Hinton, Arthur Niell, Shep Doeleman, Mikael Taveniku, Christopher Beaudoin, Chester Ruszczyk, Russ McWhirter • NRAO: • Doug Gerrard, Bob McGoldrick, Hichem Ben Frej, George Peck, Steve Durand, Jon Romney, Craig Walker, Mike Revnell, Walter Brisken, Keith Morris, Jim Jackson, Miguel Guerra, Matt Luce • CASPER • KAT

  3. The Very Long Baseline Array

  4. VLB A Current IF Processing • Four IFs • Eight sidebands • 2 sidebands (upper/lower) per IF • 16MHz per sideband • 128 Mbps peak data rate

  5. VLBA Upgraded IF Processing • Single sideband • Up to Four IFs • 512MHz per IF • 4x128MHz sub-bands per IF • 16 total down-converters per DBE • 4096Mbps peak data rate

  6. DBE Hardware: Overview

  7. DBE Framework/Infrastructure

  8. Synthesizer/Clock Distribution Board • Inputs • 5MHz reference (Maser) • GPS 1 PPS • Outputs: • 1024MHz (3 copies) • 1.5o RMS phase noise • 1 PPS (4 copies) • Buffers ALC control signals from ROACH

  9. Automated Level Control (ALC) • Gain: -11dB to +20dB in 1dB steps • Optional 20dB fixed attenuator • 2 channels

  10. ALC-Bandpass variation

  11. ALC Delay variation

  12. Anti-aliasing filter amplitude

  13. Anti-aliasing filter: band edges

  14. Anti-aliasing filter: stopband

  15. Anti-aliasing filter: phase

  16. DBE Framework/Infrastructure • Blue boxes are Haystack specific and will be replaced in the DDC personality

  17. DDC: Block Diagram

  18. ALC: Raw sample capture • Accepts de-multiplexed samples from both ADC channels • Selectable IF0/IF1 capture • Output sample stream: • Up to 32768 time continuous samples of the raw ADC data • Two access methods: • File • Network socket

  19. ALC: Raw sample capture examples

  20. ALC: Power setting loop • Relative Power • Vrms to dBm • Adjust ALC linearly in dB

  21. GUI: Device Browser, Matrix Switch

  22. GUI: Device Browser, DBE

  23. GUI: Monitor archive query tool

  24. GUI: Monitor archive data

  25. Results 1: Autocorrelation on LA

  26. Results II: 0 Baseline Cross-correlation

  27. Questions?

  28. ALC Adjustment Range • Nominal Input power to the DBE: -33dBm.

  29. DDC: Specifications • As per the VLBA sensitivity upgrade project book, the filters in the DDC personality must conform to the following: • Quantity: Eight DDCs per 512MHz wide channel • Tunable range: Within the 512MHz wide channel • Minimum tuning step: 1 Hz (center frequency specified). • Output truncation: Any number of bits between 1 and 8. • Decimated output rate: 128 kbits/s – 2048 Mbits/s. • Return to previous phase after switching to another frequency/bandwidth and back.

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