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Pixel nSQP Electrical readout Status. Presented by David Nelson djn@slac.stanford.edu. Cable board layout status. Cable board layout is finished. Gerber files sent to Danilo. Danilo plans to fabricate 20 boards. 10 for CERN and 10 for SLAC.
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Pixel nSQPElectrical readoutStatus Presented by David Nelson djn@slac.stanford.edu
Cable board layout status • Cable board layout is finished. • Gerber files sent to Danilo. Danilo plans to fabricate 20 boards. 10 for CERN and 10 for SLAC. • Please ask the board shop not to silk screen top side of PWB
E-board board layout status • More work on layout needed. • Proposed third mounting hold seems to be to close to 60 pin connector. Also need a rigid board covering the 60 pin connector. • Biasing of LVDS is still a concern. • Schematic suggests that Vos is set to 0.432 volts. Document says its 0.75 volt. • External bias pins, Vbp & Vpn, appear to be very low impedance as determined from schematics. Not possible to over-ride in one direction. • Mechanical drawing should reference centers of components for placement. • Can CERN board fabrication the e-board? • Rigid flex, nickel plating, gold flash 3rd hole