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Readout for BGV: first considerations

Readout for BGV: first considerations. from discussion with Guido Haefeli (EPFL) and Richard Jacobsson (CERN/LHCb). Data rates. important to use a well localized target. Assume

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Readout for BGV: first considerations

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  1. Readout for BGV: first considerations from discussion with Guido Haefeli (EPFL) and Richard Jacobsson (CERN/LHCb)

  2. Data rates important to use a well localized target Assume • Achieve a rawbeam-gas rate of max 1 MHz => can trigger with a simple activity trigger (scintillator pad) • RL0= level-0 trigger rate < ~1 MHz • thlt = avge time to take HLT decision • Ncpu= nr of CPU coresavailable in HLT • e.g. for Ncpu~ 100 weneed to achievethlt < Ncpu / RL0 = 0.1 ms • need to be smart... multi stage approach: (1) request high hit multiplicity, (2) simple projective z-vtx location from cluster info (no tracking), (3) full reconstruction... • the higher the purity of the raw rate, the more relaxed the HLtalgo Data rate: • HLT rate out Rhlt = depends on cutsapplied, say~ 1kHz to tape • Cluster info = say 14 bits for the channel, 3 bits for the interchannel distance • Event size = ~ 17bits/clus * 10 clus/plane/evt * 6 planes= 1 kbit/evt + overhead! => ~0.2 kB/evt * 1 kevt/s = 0.2 MB/s 0.2 MB/s * 107 s/yr = 2 TB/yr => think about histos, store only fraction a fraction of the full data

  3. Prototype BGV layout (one ring) each rectangle is an EPFL SciFitwosided module with straight and stereofibers Minimum: 16 modules, better: 24 96 Beetles 144 Beetles

  4. Modules/beetles • Each module is a «double» mattresswith 3 Beetles per side. • Assume either 16 / 24 modules • 96 / 144Btl • Consideredthreepossibilities: • VELO likereadout: 4 Btl/drv, 4 drv/rpt, 4Btl/Arx, 4Arx/Tell1 => 6 / 9 Tell1 • IT likereadout: 3 Btl/dig, 12Btl/Orx, 2Orx/tell1 => 4 / 6 Tell1 • «Upgrade» readout: 96 Btlinto one Tell40, requires new opticalintrefaceboards... • Retained as baseline: VELO likereadout Advantages: • EPFL/CERN «know-how» of all the front-end and back-end boards • Most components readilyavailable • Full support availableuntilat least LS2 • Possibility to recycle LHCb IT in LS2 (verysimilar to VELO)

  5. detector DAQ / CTRL (VELO like) Zero suppression VME 9U TELL1 copper, analog BASELINE x6 ADC 60m ADC Gbit nw to CPUs ADC ADC LV x6 VME 9U CTRL SPECS MASTER FE board SPECS slave drv drv drv drv LVreg could be the same crate READOUT SUPERVISOR delay LHC clock L0 trig ECS TTC 20m VME 6U TTCex 4 Beetles per drv 6 FE boards per Ctrl board 1m L0 data patch voltage supply ctrl/trig data HV Beetle SiPM SciFimattress x8 Beetle SiPM Beetle SiPM designed for ~kGy krad «no radiation»

  6. Cost of detector + readoutequipment (kCHF) • fibres: 0.3m*5*384*32=18km 6 kCHF • SiPM: 0.8kCHF*96= 8kCHF • Some are myestimates • To berefined • But the bottom line isthatthisamountssomething of the order of .... • To beaddedyet: • L0 detect& trigger • HLT/DAQ hardware total ~ 150kCHF

  7. Questions • Radiation map (SiPM): dose per year at 10, 20, 30 cm • Level0: simple scintillator + NIM electronics, feed signal to ODIN (readout supervisor). • Easy. But who ? • HLT readout network, CPUs, algos, storage media, ... • what, who ? • small readout switch needed ? • order of 100 CPU cores ? • several TB disk space ?

  8. backup

  9. detector DAQ / CTRL (IT like) VME 9U TELL1 Orx 12-fiber ribbon, optical, digital x4 100m Problem: boards not developed by EPFL. Optical components (GOL) not easy to get... Gbit nw to CPUs Orx 3 fibers per dig LV Svc box SPECS MASTER CTRL dig SPECS slave1 dig dig dig READOUT SUPERVISOR LVreg SPECS slave2 LHC clock dig dig dig dig TTC delay25 VME 6U TTCex x4 3 Beetles per dig 5m patch HV voltage supply ctrl/trig data Beetle Beetle SiPM SiPM SciFimattress SciFimattress x4 Beetle Beetle SiPM SiPM Beetle Beetle SiPM SiPM designed for ~kGy «no radiation»

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