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In pixel TDC demonstrator chip: status of the end of column readout

In pixel TDC demonstrator chip: status of the end of column readout. Giulio Dellacasa GigaTracker Working Group CERN, May 27th 2008. Chip’s layout. Top view. Pin’s description. Enable: column readout enable CLK: 160 MHz clock Backp: column readout back pressure

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In pixel TDC demonstrator chip: status of the end of column readout

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  1. In pixel TDC demonstrator chip: status of the end of column readout Giulio Dellacasa GigaTracker Working Group CERN, May 27th 2008

  2. Chip’s layout Giulio Dellacasa GTK Working Group

  3. Top view Giulio Dellacasa GTK Working Group

  4. Pin’s description • Enable: column readout enable • CLK: 160 MHz clock • Backp: column readout back pressure • OE: column output enable • EoC: coarse counter end of count • Dout: data output • Dval: data valid • Reset: master reset Giulio Dellacasa GTK Working Group

  5. End of column readout Giulio Dellacasa GTK Working Group

  6. Output stage Giulio Dellacasa GTK Working Group

  7. Data format Giulio Dellacasa GTK Working Group

  8. Status • The whole structure has been described and simulated in VHDL • The FIFO occupancy found with simulations (10k events, with different distribution’s seeds): up to 15 words. So a FIFO’s depth of 20 would be fine • CRC control added • New logic added in the pixel for handling the End of Frame condition Giulio Dellacasa GTK Working Group

  9. CRC (Cyclic Redundancy Check) p(x)/g(x) = q(x) + r(x) m(x) = p(x) + r(x) Where: • p(x) message to transmit (our data) • g(x) polynomial • r(x) reminder • m(x) transmitted message • CRC operation is performed word by word, updating the CRC value each step • In our case, for the Trailer word the CRC is calculated forcing the CRC field to 0 and then the correct value is appended CRC Giulio Dellacasa GTK Working Group

  10. CRC: polynomial • The selection of polynomial is crucial, but its goodness is based on the experience. So a standard poly is recommended • CRC-16: selected polynomial is X16+X15+X2+1 • IBM and USB standards, also used in the CMS DAQ • CRC-16 detects: single errors, double errors and burst errors (lower than 16 bit), odd number of errors. In total 99.9984 % of errors can be detected (for data length less than 215 bit, so 1024 words of 32 bit) Giulio Dellacasa GTK Working Group

  11. End of frame in pixel logic This model works fine in the simulations, but feasible in pixel? Giulio Dellacasa GTK Working Group

  12. Next steps... • In pixel logic feasibility • FIFO model with depth = 20 (now is in power of 2) • Synthesis • Routing… Giulio Dellacasa GTK Working Group

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