The ALU

1. 0 1 2 3 4 5 6 7 c 0 1 2 DECODER The ALU • ALU includes combinational logic. • Combinational logic  a change in inputs directly causes a change in output, after a characteristic delay. • Different from sequential logic which only changes on the clock. • Two major components of combinational logic are – multiplexors & decoders. 0 1 2 3 4 5 6 7 3 X 8 multiplexor s2 s1 3 X 8 Decoder

2. Basic ALU • The basic ALU provides the basic logical and arithmetic functions: AND, OR plus addition. • Subtraction in 2's complement  invert +1. • Shift, multiplication and division are usually outside the basic ALU. Logical operations a b 0 1 result MUX select (AND or OR) 1 bit logical unit for AND/OR operations

3. outputs inputs abCinsumCout 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1 Cin a b Cout 1 bit FULL adder (3,2) a b Carry out Carry in Cout Cin sum sum = (a  b  Cin) + (a  b  Cin) + (a  b  Cin) + (a b  Cin) = a + b + Cin Cout =(b  Cin) + (a  Cin) + (a  b) = ((a + b)  Cin) + (a  b) Adder hardware for Cout in 2 layers

4. a b sum Cout Cin sum a b Cout Full Adder from Half Adders Half adder Full adder from 2 half adders + or gate

5. 1 Bit Simple ALU 1 bit simple ALU for logical / arithmetic operations Cin select 2 a b 0 1 2 result + Cout

6. 1 Bit Enhanced ALU Enhanced for subtraction invert Cin select 2 a b 0 1 2 result + 0 1 1's complement Cout 2's complement: use Cin = 1 subtraction: a + b + 1 = a + (b + 1) = a + (-b) = a - b

7. Cin operation = invert + select 3 Ripple Carry Type Adder Cin ALU0 Cout a0 b0 32 bit ADDER with ripple carry: result 0 • To produce a 32 bit result, we connect 32 single bit units together. • This type of ALU adder is called a ripple adder • Carry bits are generated in sequence. • Bit 31 result and Cout is not correct until it receives Cin from previous unit, which is not correct until it receives Cin from its previous unit, etc. • Total operation time is proportional to word size (here 32). Cin ALU1 Cout a1 b1 result 1 Cin ALU2 Cout a2 b2 result 2 . . . . . . Cin ALU31 Cout a31 b31 result 31 Cout

8. Multiplication and Division • Multiplication is done by doing shifts and additions. • Multiplying two (unsigned) numbers of n bits each results in a product of 2n bits. Example: 0110 x 0011 (6x3) At start, product = 00000000 looking at each bit of the multiplier 0110, from right to left: 0:product unchanged: 00000000, shift multiplicand left: 00110 1: add multiplicand to product: 00000000 + 00110 = 00000110, shift multiplicand left: 001100 1: add multiplicand to product: 00000110 + 001100 = 00010010, shift multiplicand left: 0011000 0: product unchanged: 00010010 = 1810 shift multiplicand left: 00110000

9. Multiplying Signed Numbers • Main difficulty arises when signed numbers are involved. • Naive approach: convert both operands to positive numbers, • multiply, then calculate separately the sign of the • product and convert if necessary. • A better approach: Booth’s Algorithm. Booth’s idea: if during the scan of the multiplier, we observe a sequence of 1’s, we can replace it first by subtracting the multiplicand (instead of adding it to the product) and later, add the multiplicand, after seeing the last 1 of the sequence.

10. Example 0110 x 0011 (6x3) This can be done by (8-2)x3 as well, or (1000 - 0010) x 0011 (using 8 bit words) At start, product = 00000000 looking at each bit of the multiplier 0110, from right to left: 0:product unchanged: 00000000, shift multiplicand left: 00110 1: start of a sequence: subtract multiplicand from product: 00000000 - 00110 = 11111010, shift multiplicand left: 001100 1: middle of sequence, product unchanged: 11111010, shift multiplicand left: 0011000 0: end of sequence: add multiplicand to product: 11111010 + 0011000 = 00010010= 1810 shift multiplicand left: 00110000

11. Yet another example 1100 x 0011 (-4x3) At start, product = 00000000 looking at each bit of the multiplier 1100, from right to left: 0:product unchanged: 00000000, shift multiplicand left: 00110 0:product unchanged: 00000000, shift multiplicand left: 001100 1: start of a sequence: subtract multiplicand from product: 00000000 - 001100 = 11110100, shift multiplicand left: 0011000 1: middle of sequence, product unchanged: 11110100, shift multiplicand left: 00110000 The result is 11110100=-1210

12. Booth's Algorithm Scan the multiplier from right to left, observing, at each step, both the current bit and the previous bit: 1. Depending on (current, previous) bits: 00 : Middle of a string of 0’s: do no arithmetic operation. 10 : Beginning of a string of 1’s: subtract multiplicand. 11 : Middle of a string of 1’s: do no arithmetic operation. 01 : End of a string of 1’s: add multiplicand. 2. Shift multiplicand to the left.

13. Why does Booth’s Algorithm work ? Let a and b be signed integer numbers of n bits each. Redefine step 1 of Booth’s algorithm (see previous page): 0  (ai, ai-1) = 00 or 11  no arithmetic operation. ai-1 - ai = 1  (ai, ai-1) = 01 add multiplicand. -1  (ai, ai-1) = 10 subtract multiplicand. Calculate now the product a x b, according to Booth’s algorithm: a x b = (a-1 - a0) x 20 x b + a-1 = 0 + (a0 - a1) x 21 x b + + (a1 - a2) x 22 x b + . . . + (an-3 - an-2) x 2n-2 x b + + (an-2 - an-1) x 2n-1 x b = -an-1 x 2n-1 x b + ai x 2i x b = = b x (-an-1 x 2n-1 + ai x 2i ) = a x b {

14. Hardware for Multiplication Implementing multiplication due to Booth’s Algorithm: • At start, the multiplier occupies the right half of the • product. The left half of the product is full with zeros. • At each step, the control verifies the right most • bit of the multiplier and decides whether to add • the multiplicand to the product, to subtract it from, • or just to shift the product right (instead of shifting • the multiplicand to the left). • The shifts are signed extended. Multiplicand 32 bits 32 bit ALU • At the end, the multiplier is out • of the product register and • the product contains the • result. Shift right Product Control write 64 bits bit 0 (rightmost)

15. Division • Division is done by doing shifts and subtractions. • Dividing a number of 2n bits by a number of n bits results in a quotient of up to 2n bits and a remainder of up to n bits. Example: 01001010 : 1000 (74:8) 1001 Quotient 01001010 1000 Divisor 1000 10 101 1010 1000 10 Remainder Dividend

16. Division Algorithm At start, the n bits divisor is shifted to the left, while n 0’s are added to its right. This way the dividend and the divisor are 2n bits long. At each step (repeating the following n+1 times), subtract the divisor from the dividend. if the result is non-negative, shift the quotient left and place a 1 in the new place. else shift the quotient left and place a 0 in the new place. restore the dividend by adding the divisor to it. shift the divisor to the right. Note: the above algorithm assumes a quotient of no more than n+1 bits long. Otherwise, at initialization, we should shift the divisor left until its MSB is 1.

17. Hardware for Division Implementing division: • At start, the dividend occupies the right half of the • remainder register. The left half of the reminder • register is full with zeros. Shift reminder left 1 position. • At each step, the control subtracts the divisor from • the left half of the remainder register, putting there • the result. If the remainder is negative, it • restores it. Then, instead of shifting the divisor to • the right, it shifts the remainder to the left and • inserts 0 or 1, according to the sign of the remainder. Divisor 32 bits 32 bit ALU • 0 if the sign bit is 1 and • 1 if the sign bit is 0. • At the end, the remainder register • contains the quotient in its • right half and the remainder • in its left half. Shift left Remainder Control quotient write 64 bits bit 63 (sign)

18. Dividing Signed Numbers The above algorithm and implementation deals only with positive numbers. If negative numbers are involved, the sign of the quotient is set to MINUS if the divisor and the dividend are of different signs. The sign of the remainder, though, is more difficult to set. Follow the rule: Dividend = Quotient x Divisor + Remainder Example: +7/+2 = +3(+1) since +7 = +2*(+3)+1 +7/-2 = -3(+1) since +7 = -2*(-3)+1 -7/+2 = -3(-1) since -7 = +2*(-3)-1 -7/-2 = +3(-1) since -7 = -2*(+3)-1 Conclusion: the sign of the remainder is set according to the sign of the dividend.