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Design and Implementation of VLSI Systems (EN1600) lecture02. Sherief Reda Division of Engineering, Brown University Spring 2008. [sources: Weste/Addison Wesley – Rabaey Pearson]. dope with phosphorous or arsenic  n-type. dope with boron  p-type.

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Design and Implementation of VLSI Systems

(EN1600)

lecture02

Sherief Reda

Division of Engineering, Brown University

Spring 2008

[sources: Weste/Addison Wesley – Rabaey Pearson]

impact of doping on silicon resistivity

dope with phosphorous or arsenic  n-type

dope with boron 

p-type

Impact of doping on silicon resistivity

silicon

4.9951022 atoms in cm3

Resistivity 3.2  105 Ωcm

1 atom in billion  88.6 Ωcm

1 atom in million  0.114 Ωcm

1 atom in thousand  0.00174 Ωcm

1 atom in billion  266.14 Ωcm

1 atom in million  0.344 Ωcm

1 atom in thousand  0.00233 Ωcm

 Electrons are more mobile/faster than holes

what happens if we sandwich p n types

A

Al

p

n

B

One-dimensional

representation

What happens if we sandwich p & n types?
  • In equilibrium, the drift and diffusion components of current are balanced; therefore the net current flowing across the junction is zero.
pn junction regions of operation
PN-junction regions of operation

A forward bias decreases the potential drop across the junction. As a result, the magnitude of the electric field decreases and the width of the depletion region narrows.

In reverse bias, the width of the depletion region increases. The diode acts as voltage-controlled capacitor.

nmos and pmos transistors
nMOS and pMOS transistors

Each transistor consists of a stack of a conducting gate, an insulating layer of silicon dioxide and a semiconductor substrate (body or bulk)

nMOS transistor

pMOS transistor

Body is typically grounded

Body is typically at supply voltage

nmos transistor

g=1: When the gate is at a high voltage (VGS ≥ VTN):

      • negative charge attracted to body
      • inverts a channel under gate to n-type
      • transistor ON, current flows, transistor

can be viewed as a resistor

nMOS transistor
  • g=0: When the gate is at a low voltage (VGS < VTN):
    • p-type body is at low voltage
    • source and drain-junctions diodes are OFF
    • transistor is OFF, no current flows
pmos transistor
pMOS transistor
  • g=0: When the gate is at a low voltage (VGS < VTP):
    • positive charge attracted to body
    • inverts a channel under gate to p-type
    • transistor ON, current flows
  • g=1: When the gate is at a high voltage (VGS ≥ VTP):
      • negative charge attracted to body
      • source and drain junctions are OFF
      • transistor OFF, no current flows
pmos pass 1 more strongly than 0
pMOS pass ‘1’ more strongly than ‘0’
  • Why does ‘0’ pass degraded?
3 input nands
3-input NANDs

What are the advantages of CMOS circuit style?