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ST7: Block Diagram

ST7: Block Diagram. INTERNAL CLOCK. MULTI OSC + CLOCK FILTER. I 2 C. OSC1. PA7..0 (8 bits). OSC2. PORT A. LVD. VDD. POWER SUPPLY. SPI. VSS. PORT B. PB7..0 (8 bits). CONTROL 8 BIT CORE ALU. nRESET. ADDRESS AND DATA BUS. 16-BIT TIMER A. PORT C. PROGRAM MEMORY. PC5..0

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ST7: Block Diagram

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  1. ST7: Block Diagram INTERNAL CLOCK MULTI OSC + CLOCK FILTER I2C OSC1 PA7..0 (8 bits) OSC2 PORT A LVD VDD POWER SUPPLY SPI VSS PORT B PB7..0 (8 bits) CONTROL 8 BIT CORE ALU nRESET ADDRESS AND DATA BUS 16-BIT TIMER A PORT C PROGRAM MEMORY PC5..0 (6 bits) 8-BIT ADC 16-BIT TIMER B RAM WATCHDOG Sistemi Elettronici Programmabili

  2. ST72254 - Package Sistemi Elettronici Programmabili

  3. ST72254 Memory Map Sistemi Elettronici Programmabili

  4. ST72254 – Interrupt Vector Sistemi Elettronici Programmabili

  5. ST72254 Registers (1) Sistemi Elettronici Programmabili

  6. ST72254 Registers (2) Sistemi Elettronici Programmabili

  7. ST72254 Registers (IO) Sistemi Elettronici Programmabili

  8. ST72254 Registers (Timer) Sistemi Elettronici Programmabili

  9. ST72254 Registers (ADC) Sistemi Elettronici Programmabili

  10. IO Port: Block Diagram Sistemi Elettronici Programmabili

  11. IO Port Configurations - Input Sistemi Elettronici Programmabili

  12. IO Port Configurations – Output Opendrain Sistemi Elettronici Programmabili

  13. IO Port Configurations – Output Push Pull Sistemi Elettronici Programmabili

  14. IO Port: Registers Sistemi Elettronici Programmabili

  15. 8-BIT SUCCESSIVE APPROXIMATIONS CONVERTER WITH UP TO 8 ANALOG CHANNELS FEATURE : Accuracy : 1 LSB Total Unajusted Error MAX : 1 LSB Conversion time : 24 CPU cycle ie 3µs at full speed (8MHz) FLAGS COCO : end of conversion (Status flag) ADON : ADC on/off bit (to reduce power consumption) ADC: Overview (1) Sistemi Elettronici Programmabili

  16. LOW CONSUMPTION MODES Wait mode doesn't affect the ADC Halt mode stops the ADC. HARDWARE ST72334 and ST725xx : Vdda and Vssa must be connected externally respectivelly to Vdd and Vss through decoupling capacitors. ST72254 : connection done internally RATIOMETRIC In the Functionnal Range If analog voltage input > Vdd :converted result = FFh (no overflow indication) If analog voltage input < Vss :converted result = 00h (no underflow indication) ADC: Overview (2) Sistemi Elettronici Programmabili

  17. ADC: Block Diagram Sistemi Elettronici Programmabili

  18. ADC: Registers Sistemi Elettronici Programmabili

  19. Timer: Block Diagram Sistemi Elettronici Programmabili

  20. Timer: Block Diagram (H) Sistemi Elettronici Programmabili

  21. Timer: Block Diagram (L) Sistemi Elettronici Programmabili

  22. Timer: Read Sequence Sistemi Elettronici Programmabili

  23. Timer: Input Capture Sistemi Elettronici Programmabili

  24. Timer: Output Compare Sistemi Elettronici Programmabili

  25. Automatic generation of a Pulse Width Modulated signal Period &pulse lenght set by software: The first Output Compare Register OC1R contains the length of the pulse The second Output Compare Register OCR2 contains the period of the pulse Resolution up to 100 steps at 20 KHz (fCPU =4 MHz): 1% of accuracy on the duty cycle TIMER: PWM Mode t T Sistemi Elettronici Programmabili

  26. Free running counter is initialized to FFFCh • OLVL2 bit level is applied on the OCMP1 pin • ICF1 bit is set When the free running counter reaches OC2R register value When the free running counter reaches OC1R register value • OLVL1 bit level is applied on the OCMP1 pin Timer: PWM Flow Sistemi Elettronici Programmabili

  27. Timer: PWM Counter FREE RUNNING COUNTER VALUE Ttimer × 65535 Tmax = FFFFh FFFCh Compare 2 Compare 1 0000h time OLVL2= 1 OCMP1 Ouput Compare pin Timer output time OLVL1=0 Sistemi Elettronici Programmabili

  28. Timer: CR1 Sistemi Elettronici Programmabili

  29. Timer: CR2 Sistemi Elettronici Programmabili

  30. Timer: SR Sistemi Elettronici Programmabili

  31. Schmitt Trigger: Caratteristica Inverter Vin t Vout t Sistemi Elettronici Programmabili Sistemi Elettronici Programmabili 13-31

  32. Schmitt Trigger: Caratteristica Vout Vin Sistemi Elettronici Programmabili

  33. Schmitt Trigger: Inverter - Commutazioni Spurie Vin t Vout t Sistemi Elettronici Programmabili

  34. Schmitt Trigger: Commutazione Vin t Vout t Sistemi Elettronici Programmabili

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