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TEACHING CMOS CIRCUIT DESIGN IN NANOSCALE TECHNOLOGIES USING MICROWIND

TEACHING CMOS CIRCUIT DESIGN IN NANOSCALE TECHNOLOGIES USING MICROWIND. Syed Mahfuzul Aziz School of Electrical & Information Engineering University of South Australia Australia e-mail: mahfuz.aziz@unisa.edu.au. Etienne Sicard Sonia Ben Dhia

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TEACHING CMOS CIRCUIT DESIGN IN NANOSCALE TECHNOLOGIES USING MICROWIND

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  1. TEACHING CMOS CIRCUIT DESIGN IN NANOSCALE TECHNOLOGIES USING MICROWIND Syed Mahfuzul Aziz School of Electrical & Information Engineering University of South Australia Australia e-mail: mahfuz.aziz@unisa.edu.au Etienne Sicard Sonia Ben Dhia Department of Electrical & Computer Engineering INSA – University of Toulouse France e-mail: etienne.sicard@insa-toulouse.fr sonia.bendhia@insa-toulouse.fr

  2. SUMMARY • CONTEXT • EDUCATIONAL NEEDS • MICROWIND 4. EVALUATION 5. PRESPECTIVES 7. CONCLUSION

  3. CONTEXT 2005 2010 90 nm 32 nm 6 nMOS, 6 pMOS 12 nMOS, 12 pMOS 2V 1V 1V 1.5 GHz 5 GHz NANO-CMOS – MORE AND MORE COMPLEX 2000 0.18 µm Devices 3 nMOS, 3 pMOS Interconnects Frequency 500 MHz

  4. Low K Double patterning nMOS Strain Metal gate High K oxide Pocket implant pMOS Strain The quest for the « perfect switch » CONTEXT NANO-CMOS – TEACHING CHALLENGE

  5. CONTEXT Ioff (nA/µm) Parasitic consumption Networking High end - servers High (x 10) Computing 1000 « Super low leakage » Servers Consumer Mobile Computing Moderate High speed 100 (x 1) Digital camera 3G phone s General 2G phones Purpose 10 Personal org. MP3 « Super high speed » Low Low leakage (x 0.1) 1 Low Moderate Fast ( - 50%) (0%) (+50%) 500 1000 1500 Speed Ion (µA/µm) NANO-CMOS – TEACHING CHALLENGE

  6. CONTEXT RF Link Controller Code Manager RS Host Interface Layout design Microwind NANO-CMOS – COMPLEXITY CHALLENGE Teaching cell design – still necessary ? Complexity (Millions transistors) Technology always ahead 1000 System design IP design 100 Logic design 10 1 0.1 1995 1998 2001 2004 2007 2010 2013

  7. EDUCATIONAL NEEDS Teaching hours Physics CMOS design Embedded software System integration Years TEACHING NANO-CMOS – TRENDS • The commercial chip design tools available today are very powerful • However, these tools are highly complex and need long time to learn. • Teaching hours in Nano-CMOS are decreased • Physics of semiconductors are exploding in complexity (100-1000 parameters in MOS models) • Student and engineer diversity must be considered. Gaps in the background knowledge must be addressed

  8. EDUCATIONAL NEEDS Long practical PhDs sessions : Professional tools Ambitious designs Reduced number of students Educational Graduates Short tools sessions : Simple design Undergraduates Concepts L arge number of students Learning curve Education - oriented tools Rapid Industry - progress oriented tools S low progress Hours 5 10 15 20 TEACHING NANO-CMOS – NEEDS • Tools should be used by large number of students at undergraduate level • Design tools should provide intuitive design, simulation and visualization environments • Design tools should be easily accessible. Most of the work is done out of regular teaching hours (e-learning, project-based..) • Target course and practical training duration: 15 H

  9. MICROWIND COURSE CONTENTS (1-2 days) • Technology scale down, where we come from, where we are (45 nm), where we go.. • A tutorial on MOS devices, based on problem-based learning • The design of inverters, and a simple ring oscillator, and a small student contest. • The design of basic logic gates introducing interconnect design, compact design strategies, and impact on switching speed and power consumption. • The design of analog blocs introducing amplification, voltage reference, addition of analog signals, and mixed-signal blocs • A design project, e.g. converter, processing unit, OpAmp, radio-frequency block, etc..

  10. MICROWIND INTRODUCTION THE TOOL • User-friendly and intuitive design tool for educational use. • The student draws the masks of the circuit layout and performs analog simulation • The tool displays the layout in 2D, static 3D and animated 3D

  11. MICROWIND 1. 2. 4. 3. • MOS DEVICE • Traditional teaching : in-depth explanation of the potentials, fields, threshold voltage, and eventually the expression of the current Ids • Our approach : step-by-step illustration of the most important relationships between layout and performance. • Design of the MOS • I/V Simulation • 2D view • Time domain analysis

  12. MICROWIND 2. 1. 3. 4. • BASIC GATE DESIGN • Illustration of the most important relationships between layout and performance. • Design of pMOS • Design of inverters • Design of a VCO • Try to optimize the VCO for highest possible speed • Improve MOS size • Change MOS options • Make the layout more compact • Keep an eye on power consumption

  13. MICROWIND 2. 1. 4. 3. • PROJECT EXAMPLES • engage students in a stimulating learning experience using latest CMOS technologies • Circuit analysis and optimization using WinSpice • Combinational and sequential circuit layouts • ALU Design • Power amplifier Bluetooth

  14. EVALUATION AUDIENCE • The VLSI course was evaluated anonymously by the students • UNISA course evaluation questionnaire containing ten core questions and open text response. • The students rated the course very highly in all the evaluation items. • The course in the in the top-5 courses offered in engineering in UniSA. • (off-line: Dr. Aziz won the “top teacher of the year” in Australia 2009)

  15. EVALUATION INSA 5. The course developed my understanding of concepts and principles RESULTS • Answers to questionnaire UNISA

  16. EVALUATION Teachers “The tools along with the project-based course resources have assisted us to develop an educational program in our Bachelor of Engineering Program. The tools offer easy to use menus for design and simulation, and the choice of a range of technology models to enable students to develop critical design and analysis skills using the latest technologies.” (Malaysia). “Microwind and Dsch tools are used for VLSI teaching programs at both postgraduate and undergraduate levels. The project-based methodology supported by a variety of learning resources has made the learning of VLSI Design very stimulating.” (Bangladesh). “Exploring the tools is a lot of fun. The interface is very friendly, and the program is both educational and useful for designing CMOS chips.” (USA) COMMENTS Students • “From just a few logic gates, we have created a 4-stage binary counter and compiled it into layout. It also gave us the basic concepts to understand the operation of the transistors in order to extract their models.” • “The 24-hours clock project was a good exercise which permitted us to see how it is inside a semiconductor and how it works.” • “We learned a lot about designing integrated circuit. We faced some practical problems, and tried to solve them or to understand them.” • “This study allows us to understand the DAC running. In spite of some design problems, we managed to make the DAC work well.” • “Before doing this project, we hadn’t thought that there are as many ways to realize an amplifier. It’s an area not easy to understand. Each technique has its limit. We tried to optimize our operational amplifier design to maximize the gain.”

  17. PERSPECTIVES • Application note on 32 nm & 22 nm technologies • Application note on process variability and Monte-Carlo simulation • 3D views of packages based on IBIS • 3D views of carbon-nano tubes

  18. CONCLUSION • Intuitive and user friendly design tools enabled students to develop circuit design skills using nano-CMOS technologies • Illustrations (2D, 3D, I/V) help to handle increased process complexity and refinements • Effective project-based learning methodologies, helping to understand the impacts of technology scale down on factors such as speed, power and noise. • Digital and analog basic bloc design with high levels of student satisfaction. • Projects stimulate student curiosity and thinking. • Software to be tuned to 22, 17 and 11 nm technologies • Novel devices to be introduced when appropriate

  19. REFERENCES [1] E. Sicard and S. Ben Dhia “Basic CMOS Cell Design” McGraw Hill professional series, 2006. [2] E. Sicard and S. Ben Dhia “Advanced CMOS Cell Design” McGraw-Hill professional series, 2007. [3] E. Sicard, “Microwind & Dsch User's Manual, Version 3.5”, June 2009. Online at www.microwind.org. [4] S. M. Aziz, E. Sicard, S. Ben Dhia “Effective Teaching in Physical Design of Integrated Circuits using Educational Tools” to appear IEEE Trans Education, 2010 The tool, manual and course slides are online at www.microwind.org

  20. REFERENCES MICROWIND DOWNLOADS – www.microwind.net

  21. THANK YOU FOR YOUR ATTENTION

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