chapter 5 register transfer languages
Download
Skip this Video
Download Presentation
Chapter 5 Register Transfer Languages

Loading in 2 Seconds...

play fullscreen
1 / 51

Chapter 5 Register Transfer Languages - PowerPoint PPT Presentation


  • 113 Views
  • Uploaded on

Chapter 5 Register Transfer Languages. Micro-operations RTL RTL specifications Realizing RTL specifications VHDL. Chapter Outline. Specify data transfer Do not specify conditions under which transfers occur Do not specify hardware implementation. Micro-operations. Example: X  Y. X.

loader
I am the owner, or an agent authorized to act on behalf of the owner, of the copyrighted work described.
capcha
Download Presentation

PowerPoint Slideshow about 'Chapter 5 Register Transfer Languages' - benjamin-wise


An Image/Link below is provided (as is) to download presentation

Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author.While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server.


- - - - - - - - - - - - - - - - - - - - - - - - - - E N D - - - - - - - - - - - - - - - - - - - - - - - - - -
Presentation Transcript
chapter outline
Micro-operations

RTL

RTL specifications

Realizing RTL specifications

VHDL

Chapter Outline
micro operations
Specify data transfer

Do not specify conditions under which transfers occur

Do not specify hardware implementation

Micro-operations
modulo 6 counter
Counts up when U = 1

Count sequence: 000 001  010  011  100  101  000 …

V is 3-bit output = count value

C is 1-bit output = 1 when V = 000

Modulo 6 Counter
toll booth controller
C = 1 when car is at toll booth

I[1..0] indicates coin input

Outputs R, G, A:

Car in toll booth, toll not fully paid: R = 1

Toll paid: G = 1

Car left without paying full toll: R = 1, A = 1

Toll Booth Controller
vhdl vhsic hardware description language
Formal syntax – portable

Platform independent

Design for PLDs, ASICs, or custom chips

Simulate designs

Different levels of abstraction

VHDL – VHSIC Hardware Description Language
vhdl design structure
Library section

Entity section

Architecture section

VHDL Design Structure
vhdl library section
library IEEE;

use IEEE.std_logic_1164.all;

VHDL Library Section
summary
Micro-operations

RTL

RTL specifications

Realizing RTL specifications

VHDL

Summary
ad