slide1 n.
Skip this Video
Download Presentation
ECE 342 Solid-State Devices & Circuits 16. Active Loads

Loading in 2 Seconds...

play fullscreen
1 / 40

ECE 342 Solid-State Devices & Circuits 16. Active Loads - PowerPoint PPT Presentation

  • Uploaded on

ECE 342 Solid-State Devices & Circuits 16. Active Loads. Jose E. Schutt-Aine Electrical & Computer Engineering University of Illinois Ideal MOS Common Source CKT. PMOS Implementation of Active Load. Example.

I am the owner, or an agent authorized to act on behalf of the owner, of the copyrighted work described.
Download Presentation

PowerPoint Slideshow about 'ECE 342 Solid-State Devices & Circuits 16. Active Loads' - alden

Download Now An Image/Link below is provided (as is) to download presentation

Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author.While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server.

- - - - - - - - - - - - - - - - - - - - - - - - - - E N D - - - - - - - - - - - - - - - - - - - - - - - - - -
Presentation Transcript

ECE 342

Solid-State Devices & Circuits

16. Active Loads

Jose E. Schutt-Aine

Electrical & Computer Engineering

University of Illinois



Assume VDD=3 V, Vtn = |Vtp| = 0.6 V, mnCox = 200 mA/V2, mpCox=65 mA/V2, L = 0.4 mm, W = 4 mm, VAn = 20 V, |VAP| = 10 V, IREF= 100 mA. Find small-signal gain.


IC BJT Common Emitter

Cs1 & Cs2are the collector-to-substrate capacitances of Q1 and Q2 respectively


IC Common Emitter – High Frequency Model

  • High Frequency Calculations
    • Upper corner frequencies more difficult to evaluate than for discrete amp
    • Miller effect will be larger corner frequency lower

IC-CE: High-Frequency Analysis

The total input capacitance in parallel with rp1 is

Where CM1is the Miller capacitance associated with Cm1

The input and output corner frequencies are



The CE circuit (see next page) is biased so that the collector currents of Q1 and Q2 are 1.14 mA. The parameters for Q1 are: b=160, rx1= 10 W, rce1= 68 kW, Cp1 = 20 pF, and Cm1= 2.1 pF. For device Q2, the parameters are rce2= 21 kW and Cm2= 3.1 pF. Each device has a value of Ccs1 = Ccs2 = 2.5 pF. In this circuit, the power supply is 10 V and R1 = 10 kW. Find the midband gain and the upper corner frequency.

Evaluate rp1and Rout


Example (cont’)

The midband gain is:

The corner frequency of the input circuit is


Example (cont’)

The corner frequency of the output circuit is

For overall corner frequency, use SPICE


Source Follower with Active Load

  • Characteristics
    • Provides a buffer stage
    • M1 is amplifying stage
    • M2 is active load

Emitter Follower with Active Load

(current mirror)

Emitter follower can be used to drive a low-impedance load


Emitter Follower with Active Load

  • AC Properties
    • Gain is less than 1 and near 1 for typical element values
    • Frequency response has one zero and two poles
    • Exact frequency response is difficult  Use SPICE
    • Output stage of NPN current mirror serves as high impedance load at emitter of Q1

IC - Common Gate Amplifier

Substrate is not connected to the source must account for body effect

Drain signal current becomes

And since

Body effect is fully accounted for by using


IC - Common Gate Amplifier

Taking ro into account adds a component (RL/Ao) to the input resistance.

The open-circuit voltage gain is:

The voltage gain of the loaded CG amplifier is:


MOS Cascode Amplifier

Common source amplifier, followed by common gate stage – G2 is an incremental ground


MOS Cascode Amplifier

  • CS cacaded with CG  Cascode
    • Very popular configuration
    • Often considered as a single stage amplifier
  • Combine high input impedance and large transconductance in CS with current buffering and superior high frequency response of CG
  • Can be used to achieve equal gain but wider bandwidth than CS
  • Can be used to achieve higher gain with same GBW as CS

MOS Cascode Analysis


The voltage gain becomes


MOS Cascode Analysis


The voltage gain becomes


Cascode Example

The cascode circuit has a dc drain current of 50 mA for all transistors supplied by current mirror M3. Parameters are gm1=181 mA/V, gm2=195 mA/V, gds1= 5.87 mA/V, gmb2=57.1 mA/V, gds2= 0.939 mA, gds3= 3.76 mA/V, Cdb2 = 9.8 fF, Cgd2 = 1.5 fF, Cdb3=40.9 fF, Cgd3= 4.5 fF. Find midband gain and approximate upper corner frequency

The internal conductance of the current source is:

Therefore, we use Case 2 to compute the gain


Cascode Example

Gain can be approximated by

Upper corner frequency is approximated by


BJT Cascode Amplifier

Common emitter amplifier, followed by common base stage – Base of Q2 is an incremental ground


BJT Cascode Analysis

If Rs << rx1+rp1, the voltage gain can be approximated by