Fpgas and irradiated fpgas for the lhcb upgrade update
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FPGAs and IRRADIATED FPGAs for the LHCb UPGRADE (update) - PowerPoint PPT Presentation


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FPGAs and IRRADIATED FPGAs for the LHCb UPGRADE (update). Bin Gui, Ray Mountain. LVDS LOOP. LVDS LOOP. Test Project #3.0. Clock. Counter. 1 bit. 1 bit. 1 bit. 8 bit. Shiftregister. LVDS LOOP. Shiftregister. LED. Reset. Enable, Aclr. Problem.

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Lvds loop
LVDS LOOP

LVDS LOOP


Test project 3 0
Test Project #3.0

Clock

Counter

1 bit

1 bit

1 bit

8 bit

Shiftregister

LVDS LOOP

Shiftregister

LED

Reset

Enable, Aclr


Problem
Problem

  • To solve the problem of pin assignment, we have to delete a quadrant of the FPGA.

  • But we need to use the whole FPGA for test, so we modified the project to make sure that we can use the external clock through LVDS port.


Test project 3 1
Test Project #3.1

Clock

1 bit

1 bit

1 bit

6 bit

Counter

LVDS LOOP

Shiftregister

Shiftregister

LED

1 bit

Enable, Aclr

LED

Reset


Next step
Next step

  • Studying and writing programming file into FlashROM.

  • Establishing the communication between computer and the FPGA through LVDS ports


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