Decision directed joint tracking loop for carrier phase and symbol timing in qam
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Decision-directed Joint Tracking Loop for Carrier Phase and Symbol Timing in QAM. Project 2 ECE283 Fall 2004. Outline. System concept QAM signal source and receiver Decision-directed PLL Characterization Tools Submission. System Concept (1). Simplified 64-QAM communications system.

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Decision directed joint tracking loop for carrier phase and symbol timing in qam

Decision-directed Joint Tracking Loop for Carrier Phase and Symbol Timing in QAM

Project 2

ECE283

Fall 2004


Outline
Outline Symbol Timing in QAM

  • System concept

  • QAM signal source and receiver

  • Decision-directed PLL

  • Characterization

  • Tools

  • Submission


System concept 1
System Concept (1) Symbol Timing in QAM

Simplified 64-QAM

communications system

64-QAM demodulated with

perfect phase and 2.5% phase lag


System concept 2
System Concept (2) Symbol Timing in QAM

Receiver

Transmitter

QAM receiver system

QAM communication system


Qam signal source and receiver
QAM Signal Source and Receiver Symbol Timing in QAM

QAM receiver

QAM transmitter


Decision directed pll
Decision-directed PLL Symbol Timing in QAM

Decision-directed PLL system diagram


Complete system
Complete System Symbol Timing in QAM


Pll output 1
PLL Output (1) Symbol Timing in QAM

Phase locking performance with a random QAM waveform


Pll output 2
PLL Output (2) Symbol Timing in QAM

Phase locking with 10% deviated frequency signal


Pll tuning
PLL Tuning Symbol Timing in QAM

  • Modulation frequency

  • Number of waves per symbol

  • LPF

  • VCO and VCC

  • Symbol feedback delay


Characterization
Characterization Symbol Timing in QAM

  • Waveforms

  • Timing error (RMS)

  • Capture range

  • Loop lock range

  • Effect of symbol error

  • Effect of signal noise

  • And more


Tools
Tools Symbol Timing in QAM

  • A Continuous-time simulation tool

    • Simulink is recommended

    • Circuit-level simulation ?


Submission
Submission Symbol Timing in QAM

  • Files: All files should be in “lastname_firstname” directory and the directory should be compressed

    • Document: IEEE journal format, ps or pdf, “lastname_firstname.ps/pdf”

    • Source Files: One-step testable codes with appropriate waveform output scopes

  • Deadline: 11:00pm, 10/15 Friday, time marked by receiving mail server

  • Email: [email protected]


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