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FRONT-END

FRONT-END. System architecture: brief summary Analog chip design and testing Chip production and testing Board production and testing. The LHCb muon electronics project. Common project with wire chambers: same far-end structure

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FRONT-END

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  1. FRONT-END • System architecture: brief summary • Analog chip design and testing • Chip production and testing • Board production and testing Walter Bonivento - INFN Cagliari

  2. The LHCb muon electronics project • Common project with wire chambers: • same far-end structure • same front-end board conception: 2 CARIOCA chips + 1 DIALOG chip • same bids and producing companies • same people • BUT • CARIOCA  CARIOCA GEM • front end board (CARDIAC) of different size and layout • SPB integrated on the CARDIAC • different cables and connectors space requirememnts Walter Bonivento - INFN Cagliari

  3. 8 PCH 8 PCH ASD ASD SERVICE board (on crates) I2C MASTER LOW VOLTAGE CONTROLS CALIBRATION PULSES OFF DETECTOR ELECTRONICS SYNCHRONIZATION TIME (PHASE) MEASUREMENT DATA FORMATTING DATA TO MUON TRIGGER Counting Room DATA TO DAQ RECONSTRUCTION System architecture Triple_GEM det b Triple_GEM det a F/E board ON DETECTOR ELECTRONICS DIALOG 8 LCH 10m cabling (LVDS) Walter Bonivento - INFN Cagliari

  4. CARIOCA-GEM At Cdet=15-30pF, tr=8ns, Zin=50Ω, ENC=0.5-0.6fC linear up to 200fC All differential circuitry, unipolar shaping DC coupled active BLR (CERN – RIO- INFN CA) IBM 0.25 μm radiation tolerant technology 8 analog input channels 8 LVDS output channels gain about 16mV/fc @ Cdet=15-30pF Discriminator threshold can be individually set to compensate for offset from process variation internal test structure to inject signal from DIALOG to CARIOCA input; injected charge 150fC only checks if channel ON/OFF Walter Bonivento - INFN Cagliari

  5. DIALOG IBM 0.25 μm radiation tolerant technology 16 LVDS input channels 8 LVDS output channels INFN -CA • generates logical channels by OR-ing of two face-to-face physical channels • provides a masking facility to access single channels • threshold DAC and line drivers for the CARIOCA chip • integrates 16 8-bit DACs with output buffer to set the CARIOCA discriminator threshold with about 0.17fC granularity • Programmable delays 31 steps of 1.6ns 50ns max • Digital shapingoutput signal width 8 steps of 3ns 25ns max • Front-end rate and noise monitor 16 24-bits rate counters • all functionalities can be controlled via I2C interface • Triple-voted and auto-corrected register for better SEU immunity Walter Bonivento - INFN Cagliari

  6. The front end board for GEMs: CARDIAC GEM • “Final” CARDIACGEM: ~ 50 boards assembled (hand soldering of chips)_ • Tight space requirements  45x70mm length and 14mm thichkness • Two boards in one: FEB+SPB • Spark protection on the bottom; the 3 chips on the top • Spark protection circuit: only 500V  simplified  two resistors+2 double diodes -> discussed afterwards • New type of connectors and cables pitch reduced by half • need a special cable 0.635mm pitch prototypes exist and tested I2C LV 45mm LVDS 70mm bottom top Walter Bonivento - INFN Cagliari

  7. How the board is plugged in Minimum space available on the top for cables 5-6mm Walter Bonivento - INFN Cagliari

  8. Lab tests of CARDIAC (-GEM) Standard lab tests (also at the Company assembling the boards) ENC~0.5-0.6fC; not depending on channel position gain curve S-curve Cdet=15pF Problem: due to process variations spread in gain curve parameters: a)SLOPE b) INTERCEPT If one threshold value for all channels is set, then about 1fC rms effective threshold spread is obtained too much for GEMs (we want to trigger at ~2-2.5fC) remember: WPC trigger at 6-7fC much less of a problem… Walter Bonivento - INFN Cagliari

  9. Lab tests of CARDIAC (-GEM) (II) • STRATEGY to reduce the threshold spread: • measure noise counts vs. TH curve • correct for the intercept spread in two ways: • a) equalising minimum thresholds(>0!! in this chip) • b) equalising noise count values y~erfc(x) effective threshold spread is reduced to about 0.5fC(a) or 0.7fC(b) rms This can be done in LHCb and continously monitored! Walter Bonivento - INFN Cagliari

  10. Analog shapes CARIOCA vs CARIOCAGEM Cdet=15pF delta response ~1.5 of gain response to GEM signal Walter Bonivento - INFN Cagliari

  11. Analog response to δ Cdet=15pF linear gain: 0.6mV/fC CARIOCA 0.86mV/fC CARIOCAGEM Walter Bonivento - INFN Cagliari

  12. Spark protection issues test performed witout Lconservative Walter Bonivento - INFN Cagliari

  13. Spark protection issues test of the first resistor Walter Bonivento - INFN Cagliari

  14. Chamber tests (GEM) FEE boards are installed all around the detector with FC and shielded cables 24 boards both in CA and LNF <100Hz 3fC threshold e.g. in CA some issues concerning digital noise from I2C lines and a resistor assembled off by 25% from nominal value in the first batch were recently solved Walter Bonivento - INFN Cagliari

  15. Terminazione Modificata R=9 kΩ → 12 kΩ Terminazione Standard Terminazione Modificata Cardiac GEM v. 1.4 Fine Catena I2C ~2 fC ~2 fC ~2 fC Thr (2.24 mV/bin) Thr (2.24 mV/bin) Thr (2.24 mV/bin) Inizio Catena I2C ~2 fC Walter Bonivento - INFN Cagliari ~2 fC ~2 fC Thr (2.24 mV/bin) Thr (2.24 mV/bin) Thr (2.24 mV/bin)

  16. Analog shapes on detector • 90Sr 100 µCi • Low energy electrons (~2 MeV) • Collimator  0.5 mm ø • Detector Gain = 2·104 (working point @ LHCb G=6·103) average e- y x Walter Bonivento - INFN Cagliari

  17. Cosmic Ray Test Preliminary Gain=6000 Cosmic Ray Signal at the Carioca GEM Analog Output First Hit Time Distribution Single Gap Measurements Walter Bonivento - INFN Cagliari

  18. Chip Production • We need for 12 chambers 2 x 24 x 12 = 576 CARIOCAGEM +spares and 288 DIALOG • We produced about 10k CARIOCAGEM and 20k DIALOG (most of them for 8k CARDIAC’s) • Only a fraction of the produced CARIOCAGEM chips packaged and tested in a company: 500+200 reasonable yields • For DIALOG we have what we need • We are considering to package more of them as a reserve Walter Bonivento - INFN Cagliari

  19. Board Production • PROCEDURE (for CARDIAC-GEM) • 1) PCB production in a company (6 layers –gold plated pins) • 2)board assembling in (another) company • (we already have all connectors) • 3) thermal cycling (3) +70 -20 in a oven • 4) board testing in the company with a testbench • developed by INFN Walter Bonivento - INFN Cagliari

  20. Board Production • STATUS • First experience with CARDIAC most urgent for LHCb • Most CARDIAC PCBs delivered: most of them of good quality • Assembling started from CARDIAC ~ 2 months ago • Reflow soldering process with stencil printing; convection reflow process • The first batch (~2000) had problems of shorts and bad soldering in the chip pins (DIALOG pitch 0.4mm)  seen by visual inspection and by testing also thermal cycling gave low yields (~70-80%) • Review and modification of the whole assembly process now much better quality of soldering converging ”almost” ready to start production again • CARDIACGEM will benefit from arriving next… • Test bench fully operational now (4 boards together 5min) Walter Bonivento - INFN Cagliari

  21. Outlook • Final prototype perform well • We still need to do a comsic ray test including the lates news on I2C noise etc. to give a final validation to the board 1 week fro now • Launch PCB production ~ 20 days • Start assembling in the company Walter Bonivento - INFN Cagliari

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