It is better to run iterative resynthesis on parts of the circuit
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It Is Better to Run Iterative Resynthesis on Parts of the Circuit. Petr Fišer , Jan Schmidt Faculty of Information Technology Czech Technical University in Prague [email protected], [email protected] Outline. Preliminaries Iterative resynthesis Motivation Circuit resynthesis by parts

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It Is Better to Run Iterative Resynthesis on Parts of the Circuit

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It is better to run iterative resynthesis on parts of the circuit

It Is Better to Run Iterative Resynthesis on Parts of the Circuit

Petr Fišer, Jan Schmidt

Faculty of Information TechnologyCzech Technical University in Prague

[email protected], [email protected]


Outline

Outline

  • Preliminaries

  • Iterative resynthesis

  • Motivation

  • Circuit resynthesis by parts

  • Experiments

  • Conclusions

IWLS’10


Preliminaries

Preliminaries

  • Synthesis (optimization) of circuits (networks) will be discussed

  • Just for simplicity:

    • Combinational circuits are assumed

    • Mapping into arbitrary 2-input gates

  • Cost (optimality criterion, quality) = # of gates

IWLS’10


Iterative resynthesis

Iterative Resynthesis

  • Iterative resynthesis = improving the result quality by repetitive application of a single synthesis process, in order to improve the result quality

  • Possible assumption: the synthesis process cannot make the circuit worse

    • Needs not be always true

IWLS’10


Iterative resynthesis in abc

Iterative Resynthesis in ABC

  • ABC naturally supports iterative resynthesis

  • Emphasized by “choices”

  • Many possible processes

  • Suggested: repeating {choice; map}

  • Superchoice:

    fraig_store; resyn

    fraig_store; resyn2

    fraig_store; resyn2rs

    fraig_store; share

    fraig_store; fraig_restore

IWLS’10


Iterative resynthesis in abc1

Iterative Resynthesis in ABC

IWLS’10


How many iterations suffice

How Many Iterations suffice?

  • 228 of IWLS’93 benchmarks examined

IWLS’10


Motivation

Motivation

Imagine:

e64 IWLS’93 circuit (65 inputs, 65 outputs, 649 2-input gates)

Case 1 – synthesis of the circuit, as it is:

  • 530 gates

  • 2.33s runtime

    Case 2 – split the circuit into two halves, synthesize them separately, then merge the results

  • 522 gates

  • 1.73s total runtime

Where is the problem?

What’s wrong?

IWLS’10


Circuit resynthesis by parts

Circuit Resynthesis by Parts

Resynthesize(Network N, opt) {

do {

(W, NR) = Extract_Window(N, opt);

W’ = resynthesize_by_ABC(W);

N’ = NRW’;

if (cost(N’) ≤ cost(N)) N = N’;

} while (!end());

}

IWLS’10


Window extraction

Window Extraction

IWLS’10


Window extraction1

Window Extraction

Connected circuits are always extracted

Method 0 – Random selection

  • Randomly select one “pivot” gate

  • Incrementally add randomly selected adjoining gates

    Method 1 – Minimize_fanin

  • Randomly select one “pivot” gate

  • Incrementally add adjoining gates, so that the number of window primary inputs is minimized (in a greedy way)

    Method 2 – Minimize_fanout

  • Randomly select one “pivot” gate

  • Incrementally add adjoining gates, so that the number of window primary outputs is minimized (in a greedy way)

    Method 3 – Minimize_fanin+fanout

  • Randomly select one “pivot” gate

  • Incrementally add adjoining gates, so that the sum of numbers of window primary inputs and outputs is minimized (in a greedy way)

  • These methods allow for arbitrary window size scaling

  • IWLS’10


    Window extraction2

    Window Extraction

    Method 4 – RadiusSelect

    • Randomly select one “pivot” gate

    • Add all adjoining gates (i.e., all fan-in and fan-out gates)

    • For each gate in the window, do (2.), up to the given radius

      Method 5 – Windowing-like selection

      Similar to the window selection algorithm in the resubstitution process in ABC

    • Randomly select one “pivot” gate

    • Find the minimum level of its transitive fan-in to a given depth

    • Generate transitive fan-out of the pivot, to a given depth

    • For these fan-out nodes, include all transitive fan-in nodes up to the computed level into the window

  • The window size is partially determined by the circuit structure

  • IWLS’10


    Experimental setup

    Experimental Setup

    • 228 of IWLS’93 benchmarks processed

    • Resynthesis using ABC, using the “superchoice” script, followed by technology mapping into 2-input gates

    • Iterated 1000-times (recall – this should be more than enough)

    • 100% circuit resynthesis yielded 19.97% improvement in the average

    IWLS’10


    Comparison of methods

    Comparison of Methods

    Gates (size 20%)

    Time (size 20%)

    IWLS’10


    Comparison of methods1

    Comparison of Methods

    IWLS’10


    Results

    Results

    Method 0 (Random select), improvement vs. ABC iterated 1000-times

    IWLS’10


    Results1

    Results

    Method 4 (Radius select), improvement vs. ABC iterated 1000-times

    IWLS’10


    Why this happens example cases

    Why This Happens - Example Cases

    Behavior of one of the “good for us” circuits (e64)

    Method 0 (random selection)

    IWLS’10


    Why this happens example cases1

    Why This Happens - Example Cases

    Behavior of one of the “bad for us” circuits (clip)

    Method 0 (random selection)

    IWLS’10


    Convergence maybe

    Convergence, Maybe?

    IWLS’10


    Convergence maybe1

    Convergence, Maybe?

    IWLS’10


    Conclusions

    Conclusions

    • Sometimes it is better to resynthesize circuits by parts, rather than as whole

    • In cases where not, probably it is due to random fluctuations caused by random part selections

    • Resynthesis by parts converges slower, but yields better results

    • Why?

    IWLS’10


    It is better to run iterative resynthesis on parts of the circuit

    Questions

    Discussion

    Stoning to death…

    IWLS’10


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