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ITRS Factory Integration. Thanks to 100+ FI TWG members for providing inputs and participating in developing the 2007 Factory Integration chapter. Mani Janakiram December 2007 Makuhari Messe, Chiba, Japan. Global Co-Chairs: Europe: Arieh Greenberg Japan: Shige Kobayashi, Michio Honma

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Itrs factory integration

ITRS Factory Integration

Thanks to 100+ FI TWG members for providing inputs and participating in developing the 2007 Factory Integration chapter

Mani Janakiram

December 2007

Makuhari Messe, Chiba, Japan

Global Co-Chairs:

Europe: Arieh Greenberg

Japan: Shige Kobayashi, Michio Honma

Korea: C. S. Park, S. H. Park

Taiwan: Thomas Chen

US: Mani Janakiram


Agenda

Agenda

  • Scope and Difficult Challenges

  • Technology Requirements & Potential Solutions

  • Top Factory Integration Focus Areas

  • Factory Integration Cross-Cut Issues

  • Summary


Itrs factory integration

UI

Factory Integration Scope and Drivers

Factory

Operations

Production

Equipment

Factory Information

& Control Systems

AMHS

Facilities

Si Substrate

Mfg

Chip

Mfg

Wafer

Mfg

Product

Mfg

Distribution

Reticle

Mfg

  • FEOL

  • BEOL

  • Probe/Test

  • Singulation

  • Packaging

  • Test

Increasing cost &

Cycle time implications

  • Factory is driven by Cost, Quality, Productivity, and Speed

  • Reduce factory capital and operating costs per function

  • Faster delivery of new and volume products to the end customer

  • Efficient/Effective volume/mix production, high reliability, & high equipment reuse

  • Enable rapid process technology shrinks and wafer size changes


Key technologies that will impact factory design

Key Technologies that will Impact Factory Design

  • 2007 and future years were targeted to meet productivity and capture technology requirements

  • Key process & device technology intercepts that will impact the factory design are Extreme Ultraviolet Litho (EUVL), New Device Structures, new materials, 450mm conversion & huge productivity improvements

  • Economic and business challenges are equal to our manufacturing and process technology challenges in scope and breadth to attain efficiency and effectiveness

Planning for 300Prime/450mm

EUVL in Production?

New Device Structures?

450mm in Production?


Factory integration sub team 2007 update

Factory Integration Sub team – 2007 Update

2007 FI chapter provides details on technology requirements and potential solutions


Fi focus areas

FI Focus Areas


Itrs factory integration

Processing

Standby

Standby/processing

=100%

Electric power (kW)

80

70

Standby/processing

=75%

60

1:1 RATIO

50

Time

Average effective electric power

during standby (kW)

40

30

20

10

0

0

10

20

30

40

50

60

70

80

Average effective electric power during processing (kW)

Standby?

Energy conservation/ Equipment Sleep Mode

GOAL: Reduce facility operation cost by enabling facility demand based utilization model – including energy conservation

  • Actions for eqp energy conservation

  • Enable support component ‘idle mode’ when tool in not processing

  • Identify potential tool types (i.e., Dielectric, metals, dry etch, diffusion, etc.)

  • Identify capability on existing tool sets (using SEMI E54.18) and develop a pilot

  • Define potential savings

  • Define plans for integrating fab MES and facility systems

Courtesy: Factory Facilities


Next generation 300prime 450mm fab guidelines

Next Generation 300Prime/450mm Fab Guidelines

2005

2006

2007

2008

2009

2010

2011

2012?

NG Factory Guidelines combined with ITRS TR & PS

Interoperability Testing

& Reliability Verification

5

6

Factory Control

System Standards

4

300mmプライム推進派

ISMI Guidelines

450mm

Era

JEITA Guidelines

Productivity Axis

Direct Transport

Standards

Cycle time &Cost/Cm2 reduction

STK

STK

300mm

Prime

Wafer by wafer

Process

Start

Speed etc

Seasoning

etc

Production Equipment

Standards

Driven by productivity & cost improvements (Cycle time & cost/cm2)

450mm wafer

Standards

Tool

Tool

300mm

Classic

Carrier & lot-size

determination

Wafer Point

Of View

Equipment maker Inputs

2005

2006

2007

2008

2009

2010

2011

2012

2

Source

XTime

Dest

XTime

Inter-Bay

XTime

Today

Next several years

450

Time axis

Source Tool

Wait Time

Source STK

Wait Time

Dest STK

Wait Time

Dest Tool

Wait Time

3

ITRS FI TWG will synchronize with JEITA and ISMI WG on NGF (300Prime) & 450mm guidelines to address FI challenges, technology requirements and potential solutions

Courtesy: JEITA/ISMI


Itrs factory integration

Net result:Actions performed on a wafer during its time spent in the factory

Productivity is affected by:

  • Scheduling of wafers as they flow between processing equipment

  • Traceability of wafers in the factory

  • Randomization

Net result:Efficiency in using all resources in the factory

Productivity is affected by:

  • Equipment Availability

  • Equipment Utilization

  • Overall Equipment Efficiency is utilizing all processing resources

Factory View

Scale

Net result:Efficiency in use of substrate

Productivity is affected by:

  • Device geometry and scaling

  • Die Yield improvement

  • Functional Design enhancements

Net result:Optimum use of processing equipment

Productivity is affected by:

  • Throughput of processing equipment

  • Cost of processing equipment

  • Reliability of processing equipment

  • Variability of processing equipment

Unit View

Wafer view

Equipment view

Perspective

Productivity improvement approach

Equipment Performance

in the Factory

Factory Systems

Scheduling, WIP . . .

Equipment Capability and Throughput

Device Scaling

Waste reduction roadmap would address fab and equipment productivity losses (Define, Measure, Analyze, Improve)

Source: E. Englhardt, ISSM 2007

9


Itrs factory integration

Net result:Total time that a wafer spends in the factory

Eradicate waste by eliminating any time:

  • Spent waiting without action

  • Spent undergoing an action not required by all wafers

  • Spent undergoing a process that is added and subsequently removed

Net result:Total factory output of good product

Eradicate waste by closing the gap between:

  • Designed throughput and actual throughput for each piece of equipment

  • Designed use of environmental resources such as power and water, process gases, consumables, and actual consumption

Factory view

Scale

3

4

Net result:Optimum use of per unit of silicon substrate

Eradicate waste of silicon by:

  • Reducing silicon content/transistor

  • Decreasing die loss

  • Reducing the number of chips required per function

Net result:Efficiency in use of materials and investment for providing the equipment function

Eradicate waste by decreasing:

  • Equipment cost per function

  • Equipment footprint per function

  • Operational overhead

  • Equipment non-availability

Unit view

1

2

Wafer view

Equipment view

Perspective

Waste reduction potential solutions

Waste of Equipment Output

Waste of Wafer Time

Waste of Equipment Resources and Investment

Waste of Silicon

FI to focus on top 2 quadrants

Source: E. Englhardt, ISSM 2007

10


Factory visualization metrics to evaluate waste

Process

View

Tool

View

Product

View

Semiconductor Factory

Step

1

Logical

World

Product

Business

Type

Quality

Tool 1

Area A

Product

Cost

Common

Process

Group A

Process

Delivery

Physical

World

How well is it realized?

ESH

Capacity

Understanding

Assumptions

Understanding

Results

Products/Process

Factory Operation

Resources

Understanding Activity

In-Competitive Area

Competitive

Factory Visualization Metrics to evaluate waste

Key Indicators

GOAL: Provide measurable/actionable metrics for managing factory at various levels easily

Courtesy: STRJ


Enhance visibility of equipment activity

  • <8> Abnormal

    • Detection

    • Wafer Restore

    • Trouble Restore

  • <4> Eqp Conditioning

    • Dummy Wafer Setting

    • Vacuuming

    • Heating

    • Seasoning

25

  • <3> Set-ups

    • Reticle Settting

    • Ion Source Changing

  • <5> Quality Conditioning

    • Send-Ahead

    • Inspection Results Wait

    • Monitor Setting

20

15

  • <2> Recipe Setting

    • Recipe Down Load

    • Variable parameter Setting

  • <6> Actual Process

    • Processing

    • Wafer Handling

10

Processing Time

5

  • <1> Start

    • ID Read

    • Docking

    • Door Opening

    • Wafer Mapping

  • <7> End

    • Door Close

    • Undocking

y = ax + b

b

15

10

5

25

20

# of Wafers in a Carrier (lot?)

Enhance Visibility of Equipment Activity

  • FI is working on putting the equip eng data contents in ITRS tables

    • Required for data contents meeting the equipment performance needs

    • Required for enhanced equipment quality management and assurance

    • Text on equip eng data contents included in 2007 FI chapter

SECS data port exist – raw data

Equip eng data content requested  model based data + activity/event data (energy, B/A, Setup time, etc.)

setup time contributors

Impact of equip intrinsic cycle time loss defined by a model

Courtesy: STRJ


Amc concepts and requirements from fi perspective

Factory

Integration

Roadmap

Yield Enhancement Roadmap

Fab

environment

Technology

Requirements

Wafer/Tool

environment

Wafer

AMC Concepts and Requirements from FI perspective

  • AMC limits are addressed in the YE TWG, and the WECC sub TWG

  • Fab environment requirements are being defined in the FI TWG

    • Equipment, AMHS and FOUP

    • AMC monitoring & control

Courtesy: YE / WECC


Fi cross cut issues to be addressed

FI Cross Cut Issues to be addressed


Itrs litho challenges needs

Layout

Test data

Packaged IC

Device models

Circuit architecture

Design rules

Layout with critical paths

Test data

Packaged IC

Organizational, corporate cultural and geographical barriers

Circuit architecture

Device models

Designers

Design rules

Wafer fab

Masks

Masks optimized based on design intent

Role of PCS/APC?

Statistical timing optimization

Process variation distributions

Designers

Known contours of CD, topography or overlay error with mfg. process

Wafer fab

LWR = Line Width Roughness; LER = Line Edge Roughness

ITRS Litho Challenges/Needs

New mode of operation with design for manufacturing (DFM) practices

  • Design for Mfg (DFM) needed for:

    • Immersion litho challenges

    • Double Patterning needs

    • EUVL challenges

    • Controlling LWR and LER increasingly important

    • Stringent overlay tolerances needed

Present mode of operation for circuit design and fabrication

DFM

Integration of design, modeling, lithographic resolution enhancement techniques and extensive metrology needed to maintain expected circuit performance

Source: Based on ITRS Litho TWG


Factory integration summary

Factory Integration Summary

  • All FI technology requirements tables and potential solutions tables updated in the 2007 FI chapter

    • Operations, Equipment, AMHS, FICS and Facilities

  • Identified key focus areas for FI

    • Technology requirement and potential solutions for 300Prime/450mm

    • Energy Conservation (equipment sleep mode)

    • Productivity waste reduction roadmap would address fab and equipment productivity

    • AMC solutions for equipment and FOUP

  • Working with other TWG on cross-cut issues

    • With FEP, Litho, Metrology, Yield Enhancement and ESH

    • EUVL, single wafer processing, energy conservation, etc.

  • Work with other forums/WG to ensure synergy and roadmap sync.

    • Work with - ISMI 450mm WG, STRJ, IMA, JEITA, SEMI, etc.

    • Sync. on timing, technology requirements, cross-cut issues, etc.

    • Improve sub-team participation to obtain cross-synergy

  • Business strategies, market demands, and process technology changes continue to make factories difficult to integrate

    • FI TWG will continue to address these challenges in 2008 and beyond

Thanks!


Factory operations technology requirements

Backup

Solution exists

Solution being developed

Solution required

Factory Operations Technology Requirements

Key Objectives: Speed & Flexibility

1) Reduce mfg cycle times, 2) Improve Equipment Utilization, 3) Reduce Losses from High Mix


Production equipment technology requirements

Backup

Production Equipment Technology Requirements

Key Objectives: 1) NPW reduction, 2) Reliability Improvement, 3) Run rate (throughput) improvement  Productivity & Cost

Solution exists

Solution being developed

Solution required


Automated material handling technology requirements

Backup

Automated Material Handling Technology Requirements

Key Objectives: 1) Increase throughput for Traditional and Unified Transport, 2) Reduce Average Delivery times, 3) Improve Reliability

Solution exists

Solution being developed

Solution required


Factory info control systems technology requirements

Backup

Factory Info. Control Systems Technology Requirements

Key Objectives: 1) Increase Reliability, 2) Increase Factory Throughput,

3) Reduce or Maintain Mask Shop Cycle Time, 4) Reduce Costs

Solution exists

Solution being developed

Solution required


Facilities technology requirements

Backup

Facilities Technology Requirements

Key Objectives: 1) Factory Extendibility, 2) AMC,

3) Rapid Install/Qualification, 4) Reduce Costs

Solution exists

Solution being developed

Solution required


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