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Status of the LKr readout project

Status of the LKr readout project. R. Fantechi. CREAM status. Cream specifications. Prototype board. ANALOG TESTS. MARCH 27th:CREAM DELIVERED AT CERN .

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Status of the LKr readout project

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  1. Status of the LKr readout project R. Fantechi

  2. CREAM status

  3. Cream specifications

  4. Prototype board

  5. ANALOG TESTS MARCH 27th:CREAM DELIVERED AT CERN On of the first issuestobeaddressedistocheck the qualityof the analogsignal and itsdigitisationbyverifyingthat the CREAM complieswith the parametersspecified in the tender MOST IMPORTANT PARAMETERS: • Effectivenumberofbits(ENOB) >10 • Integralnon-linearity < 5 LSB • Differentialnon-linearity < 2 LSB • Cross-talk < 70 dB • Noiselevel/channel < 2 LSB • Common mode noise < 2 LSB • Rise time 40 ns, 70 ns FWHM • Gainuniformitywithin 1%

  6. ENOB measurement Whatis ENOB? Given a N bit ADC, the ENOB variablerepresents the number n(<N) ofbitswhich are effectivefor the sampling, once the bitsinterestedbythe noise in the samplingprocess are subtracted DIGITAL FILTER • Input signal: 5 MHz sinewave. • Filterbefore CREAM • input toquenchhigher-orderfrequencies • Ad-hoc CREAM firmwareused: uponrequestfrom the PC (ethernet packet) 65K samples are collected SINE & CLOCK GENERATORS Sinewavegeneratorisphase-lockedwith the CREAM clock toallowforanintegernumberofsineperiodswithin the collected sample (requiredby FFT) FILTER BANDWIDTH FILTER+CREAM

  7. ENOB measurement • Howtocompute ENOB: • Feed a 5 MHz wave in the digitalfilters. The dynamicrangeshouldbeas wide aspossible (safetyfactorof 10 ADC countsfrom the edgesusedhere) • Collect the samples and feed a histogram, eachbincorrespondingto the samplingindex • Perform a Fast Fourier Transform (FFT) tocompute the relevanceofeachharmonic in the histogram. As the samplingis @ 40 MHz, the highestmeasurableharmonicis 20 MHz (Nyquisttheorem) • Compute the SINAD (SignaltoNoise And Distortionratio), i.e. the ratioof the 5 MHz harmonic and the sum ofotherharmonics • Compute the ENOB as: DIGITISATION FFT NOISE: the output ofchannelsnotpulsedislooked at. The noise (xtalk) shouldnotexceed 70 dBaccordingtospecifications

  8. CHANNEL 0-15 (upper connector) ENOB DISTRIBUTION (150 EVENTS) • CHANNEL 0 PULSED • nearbychannels (1,2,3) show a noiseabove the specifications • smallpeaks at low frequencies in some channelstobeunderstood (maybefrom a DC-DC converter?) • Components @ 10,15 MHz in the pulsedchannel • ENOB withinspecification

  9. The crosstalk “follows” the pulsedchannels CHANNEL 0-15 (upper connector) CHANNEL 9 PULSED

  10. NON-LINEARITIES Differential and integral non-linearities measured using a statistical method, feeding a sinewave with an amplitude slightly larger than the dynamic range, in order to populate all bit codes. From the histograms of codes, with a set of formulae , one can extract DNL and INL INL, DNL wellwithin the specifications, issimilartowhatreported in the ADC manual CHANNEL 12 DNL INL and DNL from ADC manual INL THEORETICAL VS EXPERIMENTAL DISTRIBUTION

  11. NON-LINEARITIES CHANNEL 8 Some channelsseemworsethanothers, butstillwithinspecifications. Maybeitmightbeworthcollecting more data toseefinerstructures

  12. CROSSTALK The valueof the crosstalkin the channelscloseto the pulsedoneexceeds the specifications (<70 dB). Whatisresponsibleforthis? A. Romboli: “the main source of cross-talk is the DB50 connector” TEST: pulse the lowerchannel (15) on the upper connector, seehow the upper channelsof the lowerconnectorbehave. The pattern of the first twoofthesechannels (16,17) isveryclosetothatof the pulsedchannel, so if the crosstalkis due to the PCB itshould show up anyway. DAUGHTERBOARD: FRONT SIDE (ODD CHANNELS) DAUGHTERBOARD: REAR SIDE (EVEN CHANNELS)

  13. Crosstalk RESULT: adiacentchannels show verylimited or non-existentcrosstalk. The largecrosstalkdetectedisverylikelytobe due to the connector. CHANNEL 15 PULSED CHANNELS 8-15 Probably due toPCB-transmitttednoise, butcompliantwithspecifications CHANNELS 16-23 SOLUTION: Andrea willuse a differentconnectorfor the pre-production (10 boards). Withthismodification, the crosstalkshoulddecreasesensibly

  14. SINGLE/COMMON MODE NOISE Accordingto the tender, the noiselevel per channel and the common mode noiseshouldbemeasured. Use both pedestal and a transceiver output-like signal, from the function generator Delay of the trigger to the CREAM was set with a timing unit: not good, at least 0.1% error on the delay. With 5 ms delay this is O(usec), then the signal was moving in the readout window Fixed with an update of the TALK firmware to digitally delay the signal These measurements allow also the check of the shaped pulse width

  15. Pedestals Pedestal distributions channel 0-15 Incoherent and coherent noise

  16. Pulsed channels Pedestal distributions channel 0-15

  17. Pulse shapes Shapes channel 0-15 Channel 0 pulsed Shape channel 0

  18. FIRMWARE UPDATES Severalupdatesreceivedfrom CAEN and testedsince the last meeting • 09/04/2013: Continuousfirmware (65K consecutive samples sent uponrequest) • 23/04/2013: Retrievalofdestination IP/MAC fromrequestpacket • 20/05/2013: First implementationof trigger sum links (TO BE TESTED) • 17/06/2013: Working implementation of ARP and IP multicast communication + first basic zero suppression mechanism (to be tested during the dry run) Ongoing test activitieson CREAM firmware/software: dailycollaborationwith CAEN people to solve problems and patch bugs • NEXT FORESEEN FW UPDATES: • Choke-errorfunctionalities • VME download of the CREAM firmware • Improved zero suppression

  19. L0 receiver mezzanines

  20. Introduction: Requirements • FUNCTIONALITY • - 32 trigger tiles per TE62 / 16 trigger tiles per TEL62 mezzanine • • 2 mezzanine cards per TEL62 which will be named: “TELDES” • • 16 bit @ 40 MHz per tile • • 8 ethernet cables (Cat5e or cat6) per CREAM to be received • • 16 Deserializer DS92LV16 (To TEL62 FPGA) • • 16 Equalizer DS15EA101 (Data from CREAM to Deserializer) • • 16 CLK to the TEL62 FPGA • PROTOTYPE PHASE • • 4 CARDS: 2 TO ASSEMBLE 1 TEL62 + 2 Cards SPARE • FIRST RELIABILITY TESTS • Digital performance: bit error rate (BER) using LVDS-18B-EVK (complete kit for evaluation of National SerDes devices DS92LV18) Mauro.piccini@pg.infn.it June 2013

  21. Prototype developments Mezzanine Board “TELDES” 8 ethernet cables per board RJ45 terminated Mauro.piccini@pg.infn.it June 2013

  22. Prototype developments Mauro.piccini@pg.infn.it June 2013

  23. Preparation for the installation

  24. CPD racks, crates and modules • All modules/crates dismounted, end May 31st • Cable ends protected with bubble plastics • SLM units dismounted, together with the adapter boards on the back of CPDs • All the Fastbus and clock cables around have been removed • Very few cables of the old installation will be left • All the crates are now on ECN3 floor waiting a better packing and the move to the storage area • Ready to start the new installation

  25. Rack infrastructure • Cooling: go to new heat exchangers • Start with a reliable system • New ones will be shorter: more space in the back to play with switches and cables • Power distribution: new plugs to be mounted inside the racks to allow them to be closed • Optical fibers: all installed • First lot of VME crates delivered • All powered and connected to the netowrk for DCS exercising

  26. Channel checks • We started some time ago a campaign of channel checks with calibration and scope, to spot possible problems with transceivers, power supply and (hopefully not) preamplifiers. • Almost 10000 channels done • Results to be analyzed • The rest will be done soon • After the replacement of a broken regulator board • After the installation of the fibers

  27. CREAM test bench @ 918 • We have prepared a setup in the PC farm room mainly to test the CREAM networking firmware in conjunction with the PC farm • A crate with up to now 1 prototype CREAM • A switch of the final type, configured as it will be • A fiber connection to the router • A couple of general purpose PCs connected to it • The CAEN PCI/VME interface and its software have been temporarily installed in the PC Farm user interface PC. It will be moved to a dedicated one soon • This setup will be moved in ECN3 for the dry run to exercise the complete chain from the calibration pulses to the PC farm.

  28. CREAM @ July 2013 dry run • This setup will be moved in ECN3 for the dry run to exercise the complete chain from the calibration pulses to the PC farm. • Connection to the TTC trigger and clock distribution • Connection to the experiment network • Acquisition of calibration pulses • Delivery of data to the PC farm on request • Specific implementation of IP multicast done • It will be thoroughly tested • Exercise the readout chain up to the maximum possible rate • 100 KHz of L1 requests

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