CMS Tracker FED CMS Tracker System Meeting Test Rob Halsall et al 30 July 2001 CERN

1. CMS Tracker FEDCMS Tracker System MeetingTest Rob Halsall et al30 July 2001CERN

2. CMS Tracker FED Test96 ADC Module analogue digital FLASH 3V 3V 3V 2.5V 1.8V 1 1 Opto Rx 1 1 Dual ADC I2C FPGA config Synch & Processing VME VME Interface SBC FE 1 ASIC BScan PD Array 6 12 way FR Dual ADC 12 FPGA FPGA 1 Temp Sense I2C QDR SSRAM 3V 3 Prog Delay 12 FPGA SLINK Readout & Synch Control DAQ TTS FPGA 3V 1.8V 2.5V 85 3V 3V clk40 43 Opto Rx 8 8 Dual ADC 9 TTCrx Synch & Processing FE 8 ASIC ASIC PD Array 12 way FR 48 96 Dual ADC FPGA Temp Sense I2C 3V 3 Clock inj Prog Delay 12 BSCAN FPGA TTC

3. CMS Tracker FED System OverviewBoard Layout Reference 96 ADC Channels digital analogue Top view 360 MByte/s FE 1 adc FE FPGA adc adc VME FPGA VME 360 MByte/s FE 2 adc FE FPGA adc adc 360 MByte/s FE FPGA adc FE 3 adc adc SSRAMs 360 MByte/s FE 4 FE FPGA adc SLINK PMC adc TTS adc RO FPGA 360 MByte/s FE 5 FE FPGA adc Boundary Scan adc adc 360 MByte/s FE FPGA TTCrx adc FE 6 adc 100 KHz adc TTC 360 MByte/s FE FPGA adc FE 7 adc 150 MByte/s/% adc DAQ 360 MByte/s adc FE FPGA FE 8 adc adc

4. Analogue Scan I/O via Test Modules ‘Bed of Nails’ ATE test for Analogue? ‘Fying Probe’ test for Analogue? Boundary Scan Test digital devices Bounday Scan Test Modules for I/O CMS Tracker FED TestPost Assembly 1 96 ADC Channels Assembly Company digital analogue Top view Test board AFG Test board or PSU Opto Rx position adc FE FPGA adc x12 adc BSCAN CARD VME FPGA Sysclock adc FE FPGA adc adc BSCAN Module FE FPGA adc Loop back adc adc SSRAMs FE FPGA Test board Loop back adc adc BSCAN adc DAC RO FPGA Loop back FE FPGA adc Loop back adc adc FE FPGA TTCrx adc adc Simple Passive Loop back Version adc FE FPGA adc adc adc adc FE FPGA adc x96 adc

5. Boundary Scan digital devices ‘Bed of Nails’ ATE test for Analogue ‘Flying Probe’ ATE test for Analogue Bounday Scan Test Modules for connectors with digital signals CHIPSCOPE JTAG Readout… CMS Tracker FED TestPost Assembly 1+ 96 ADC Channels Assembly Company digital analogue Top view Test board Test Module PSU Opto Rx position adc FE FPGA adc adc BSCAN CARD or CHIPSCOPE VME FPGA Sysclock adc FE FPGA adc adc FE FPGA adc FPGA adc adc SSRAMs FE FPGA adc Test CMC adc DAC/AFG adc RO FPGA FPGA FE FPGA adc adc adc FE FPGA TTCrx adc adc adc FE FPGA adc adc adc adc FE FPGA adc adc Analogue signal Injection

6. Little design effort required Early readout of ADC data No VME Interface required Chipscope Logic Analyser per ADC embedded in FPGA Efffectively ‘Scope Mode’ with JTAG Readout CMS Tracker FED TestChipscope 96 ADC Channels Assembly Company digital analogue Top view Test board AFG Test board or PSU Opto Rx position adc FE FPGA adc x12 adc Chipscope VME FPGA adc FE FPGA adc adc FE FPGA adc Loop back adc adc SSRAMs FE FPGA Test board Loop back adc adc BSCAN adc DAC RO FPGA Loop back FE FPGA adc Loop back adc adc FE FPGA TTCrx adc adc Simple Passive Loop back Version adc FE FPGA adc adc adc adc FE FPGA adc x96 adc

7. Simple DC scan test of ADC bits Too complicated? Single DAC Opto Tx fanned out 96 way Boundary Scan controlled... CMS Tracker FED TestPost Assembly 2 Assembly Company or RAL 96 ADC Channels digital analogue Top view Test Module PSU adc FE FPGA adc adc BSCAN CARD VME FPGA Sysclock adc FE FPGA adc adc FE FPGA adc FPGA adc adc SSRAMs Test CMC FE FPGA adc adc BSCAN Controlled DAC & Opto Tx adc RO FPGA FPGA FE FPGA adc adc adc TTC FE FPGA TTCrx adc adc adc FE FPGA adc adc adc adc FE FPGA adc adc

8. CMS Tracker FED TestInternal tests via VME RAL 96 ADC Channels digital analogue Top view adc FE FPGA adc adc VME FPGA VME VME SBC adc FE FPGA adc adc FE FPGA adc adc adc SSRAMs FE FPGA adc TTS SLINK CMC adc adc RO FPGA Boundary Scan FE FPGA CHIPSCOPE adc adc EXT Clock adc FE FPGA TTCrx adc adc adc FE FPGA adc adc adc adc FE FPGA adc adc

9. CHIPSCOPE FPGA Embedded Logic Analysers readout via Boundary Scan Level of Analogue testing? crosstalk, performance... CMS Tracker FED TestPerformance/Soak RAL 96 ADC Channels digital analogue Top view adc FE FPGA adc adc VME FPGA VME VME SBC adc FE FPGA adc adc FE FPGA adc adc adc SSRAMs FE FPGA adc SLINK CMC TTS adc adc AFG & Opto Tx RO FPGA FE FPGA adc adc BSCAN CHIPSCOPE adc TTC System FE FPGA TTCrx adc adc adc FE FPGA adc adc adc DAQ System adc FE FPGA adc adc

10. CHIPSCOPE FPGA Embedded Logic Analysers readout via Boundary Scan for commissioning Detector Module Generate input test signals CMS Tracker FED TestIn System RAL/CERN 96 ADC Channels digital analogue Top view Detector adc FE FPGA adc adc VME FPGA VME VME SBC Detector adc FE FPGA adc adc FE FPGA Detector adc adc adc SSRAMs Detector FE FPGA adc SLINK PMC adc TTS adc RO FPGA Detector FE FPGA adc adc Boundary Scan CHIPSCOPE adc TTC System Detector FE FPGA TTCrx adc adc adc Detector FE FPGA adc adc adc DAQ System adc FE FPGA Detector adc adc

11. BE FPGA -> DAQ & TTS Generate input test signals to DAQ &TTS Fixed Pattern & Random Data Generation FED ‘SCOPE’ MODE + async Trigger Setup timing & calibration APV diagnostics CMS Tracker FED TestIn System - other aspects CERN 96 ADC Channels digital analogue Top view Front End adc FE FPGA adc adc VME FPGA VME VME SBC Front End adc FE FPGA adc adc FE FPGA Front End adc adc adc SSRAMs Front End FE FPGA adc SLINK PMC TTS adc adc BE FPGA Front End FE FPGA adc Boundary Scan CHIPSCOPE adc adc TTC System Front End FE FPGA TTCrx adc adc adc Front End FE FPGA adc adc adc DAQ System adc FE FPGA Front End adc adc

12. CMS Tracker FED TestEquipment List • JTAG • Laptop & JTAG Software, USB-JTAG box, JTAG-I/O box, Cables & Connectors • VME I/O Module, Analogue I/O Module, SLINK I/O Module • Analogue Performance Tests • Arbitrary Function Generator • Analogue I/O Module • Chipscope Kit • Optical Test • +Electrical-Optical Converter & Fanout • Other Items • TTC System, Clock Generator • VME SBC, VME-PC Interface • SLINK Modules • Labview, VxWorks…. • 9U VIPA Crate • Cooled Rack, Cooler