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Chapter 7 MSP430 Assembler

BYU CS/ECEn 124. Chapter 7 - MSP430 Assembler. 2. Topics to Cover. High Level vs. AssemblyMSP430 AssemblerAssembly CodeAssembly ProcessAssembly DirectivesAssembly SectionsLinkerLibrariesCode Composer Essentials/StudioDevice: LED'sSystematic DecompositionAssembly Instructions. BYU CS/ECEn 124.

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Chapter 7 MSP430 Assembler

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    1. Chapter 7 MSP430 Assembler / Linker

    2. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 2 Topics to Cover High Level vs. Assembly MSP430 Assembler Assembly Code Assembly Process Assembly Directives Assembly Sections Linker Libraries Code Composer Essentials/Studio Device: LEDs Systematic Decomposition Assembly Instructions

    3. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 3 Moving Up Levels of Abstraction

    4. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 4 High Level vs. Assembly High Level Languages More programmer friendly More ISA independent Each high-level statement translates to several instructions in the ISA of the computer Assembly Languages Lower level, closer to ISA Very ISA-dependent Each instruction specifies a single ISA instruction Makes low level programming more user friendly More efficient code

    5. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 5 Why Assembly Code? Allows us to work at a slightly higher level than machine language. Allows us to use symbolic names for opcodes Allows us to use symbolic names for memory locations - SUM, PRODUCT Dont need to know every address of every storage location. Calculates addresses for us really a big deal! Helps to allocate memory locations. Provides additional error checking

    6. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 6 Assembler

    7. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 7 Assembler Syntax Each assembly line begins with either a label, a blank (tab), an asterisk, or a semicolon Each line has four fields: {label[:]} mnemonic {operand list} {;comment} Some line examples are: .sect ".sysmem" ; data space var1 .word 2 ; variable var1 declaration .text ; program space loop: mov #COUNT,r5 ; get counter .end ; end of program

    8. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 8 Assembly Code Example

    9. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 9 Assembly Symbols Symbols Symbols are used as labels, constants, and substitution values Symbols are stored in a symbol table A symbol name is a string of up to 200 alphanumeric characters (A-Z, a-z, 0-9, $, and _) A symbol cannot contain embedded blanks and the first character cannot be a number Symbols are case sensitive Symbols used as labels become symbolic addresses that are associated with locations in the program Labels used locally within a file must be unique.

    10. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 10 Assembly Labels Label Field Labels are optional Labels must begin in column 1. A label can contain up to 128 alphanumeric characters (A-Z, a-z, 0-9, _, and $) Labels are case sensitive and the first character cannot be a number A label can optionally be followed by a colon The value of a label is the current value of the Location Counter (address within program) A label on a line by itself is a valid statement

    11. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 11 Assembly Mnemonics Mnemonic Field The mnemonic field follows the label field. The mnemonic field cannot start in column 1; if it does, it is interpreted as a label. The mnemonic field contains one of the following items: MSP430 instruction mnemonic (ie. ADD, MOV, JMP) Assembler directive (ie. .data, .list, .equ) Macro directive (ie. .macro, .var, .mexit) Macro call

    12. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 12 Assembly Operands Operand Field The operand field follows the mnemonic field and contains one or more operands. The operand field is not required for all instructions or directives. An operand may consist of: Symbols Constants Expressions (combination of constants and symbols) Operands are separated with commas

    13. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 13 Assembly Constants Constants The assembler maintains constants internally as a 32-bit, signed (2s complement) or unsigned numbers Constants are not sign extended The pound sign precedes a constant in an instruction mov #123,r15 Types of constants: Decimal: string of decimal digits ranging from -2147483648 to 4294967295 (ie, 1000, -32768) Hexadecimal: string of up to 8 hexadecimal digits followed by suffix H (or h) or preceded by 0x (ie, 78h, 0x78) Binary: string of up to 32 binary digits followed by suffix B (or b) (ie. 0000b, 11110000B)

    14. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 14 Assembly Expressions Expressions An expression is a constant, a symbol, or a series of constants and symbols separated by arithmetic operators An expression evaluates to a 32-bit number -2147483648 to 2147483647 for signed values 0 to 4294967295 for unsigned values The precedence order of expression evaluation is First, evaluate parenthesized expressions Second, evaluate operators according to precedence groups Third, when parentheses and precedence groups do not determine the order of expression evaluation, the expressions are evaluated from left to right

    15. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 15 Assembly Operators Operators are used in expressions and evaluated according to the following precedence groups:

    16. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 16 Assembler Directives Assembly directives are used to specify: Starting addresses for programs Starting values for memory locations Specify the end of program text.

    17. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 17 Assembly Process The assembler translates assembly language programs (.asm) into the machine language of the ISA (.obj) There is a 1-to-1 correspondence between assembly language instructions and instructions in the final machine language First Pass: find all labels and their corresponding addresses - this information is stored in the symbol table Second Pass: convert instructions to machine language, using information from symbol table, report undefined symbols

    18. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 18 1st Pass: Construct Symbol Table Find the .text assembly directive and zero the Location Counter ($) For each non-empty line in the program: If line contains a label, add label and current LC to the symbol table If line contains an instruction, increment the LC accordingly 1. All instructions are 2, 4, or 6 bytes in length 2. Some directives like .bss or .string increment LC by the size of the operand. Stop when .end directive is found.

    19. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 19 2nd Pass: Generate Machine Language Reset location counter (LC) For each executable assembly language statement, generate the corresponding machine language instruction resolve labels referenced in instructions using the symbol table increment LC for each instruction as in pass 1 output resulting machine code and program listing to output files Stop when .end directive is found.

    20. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 20 Assembler Sections A section is a block of code or data that occupies contiguous space in the memory map with other sections. Each section of an object file is separate and distinct but may be combined with other sections Object files contain three default sections: .text section executable code (default) .data section initialized data .bss section uninitialized variables

    21. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 21 Assembler Sections There are two basic types of sections Initialized sections (.text, .data, and .sect ) contain data or code. Uninitialized sections (.bss and .usect) reserve space in the memory map for uninitialized data. The assembler assembles into the current section The initialized section directives tell the assembler to stop assembling in the current section and begin assembling in the indicated section. The uninitialized section directives, however, do not end the current section, but simply escape from the current section temporarily. Thus uninitialized directives .bss and .usect can appear anywhere in an initialized section without affecting its contents.

    22. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 22 Common Assembler Directives

    23. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 23 Assembly Process The assembler translates 1-to-1 assembly language instructions (.asm) into the machine language of the ISA (.obj) 1st Pass: store all labels and their corresponding addresses in the symbol table Find the .text assembly directive and zero the Location Counter ($) For each non-empty line in the program: if line contains a label, add label and current LC to the symbol table if line contains an instruction, increment the LC accordingly Stop when .end directive is found. 2nd Pass: convert instructions to machine language, using information from symbol table Find the .text assembly directive and zero the Location Counter ($) For each executable assembly language statement: generate the corresponding machine language instruction resolve labels referenced in instructions using the symbol table increment LC for each instruction as in pass 1 output resulting machine code and program listing to output files Stop when .end directive is found.

    24. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 24 Linker The Linker program "links" two files together according to their declared sections:

    25. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 25 Library Routines Library A set of routines for a specific domain application. Example: math, graphics, GUI, etc. Defined outside a program. Library routine invocation Labels for the routines are defined as .def Each library routine contains its own symbol table. A linker resolves the external addresses before creating the executable image. Reports and unresolved symbols.

    26. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 26 Linking Multiple Files

    27. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 27 Quiz Create assembler and linker symbol table values for the following program: (Note: the linker begins the .text section at memory address 0xf800.)

    28. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 28 Assembly Style Guidelines Provide a program header, with authors name, date, etc., and purpose of program. Start labels, opcode, operands, and comments in same column for each line. (Unless entire line is a comment.) Use comments to explain what each register does. Remember, the assembler is case sensitive. Use meaningful symbolic names. Mixed upper and lower case for readability. ASCIItoBinary, InputRoutine, SaveR1 Provide comments between program sections. Each line must fit on the page -- no wraparound or truncations. Long statements split in aesthetically pleasing manner.

    29. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 29 CCE Window C/C++ Perspective

    30. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 30 CCE Window Debug Perspective

    31. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 31 The MSP430 Assembler Create a new Assembly language project: In File -> New Project choose Managed Make C/ASM Project (Recommended) Assign a name to the project in Project Name, (e.g., stoplight) Choose Project Type: MSP430 Executable In Additional Project Setting, do not choose any connection with other projects In the Device Selection page, select the target device MSPF2013 or MSP430F2274 Select configuration option: Assembly only Project At the end of this sequence of operations, a project named stoplight is opened in the work environment Add to project: Assign a new source code file to the project. In the option Menu > File > Source File and create a new file called stoplight.asm In the project properties menu, set the entry point as identified by the label start This option is found on page Build C/C++ build > MSP430 Linker V3.0 > Symbol Management > Specify the program entry point for the output model (-entry point). Debug/run project: Select Debug Active Project

    32. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 32 LEDs A light-emitting diode (LED) is a semiconductor light source When a diode is forward biased (switched on), electrons are able to recombine with holes within the device, releasing energy in the form of photons

    33. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 33 LEDs eZ430-F2013 Development Tool P1.0 Green LED Enable port bit for output by writing a 1 to the port direction register bis.b #0x01,&P1DIR ; P1.0 output Turn LED off by writing a 0 to the port pin bic.b #0x01,&P1OUT ; turn off LED Turn LED on by writing a 1 to the port pin bis.b #0x01,&P1OUT ; turn on LED Toggle LED by XORing a 1 to the port pin xor.b #0x01,&P1OUT ; toggle LED

    34. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 34 Systematic Decomposition Finiteness Must terminate. Definiteness Each step is precisely stated. Effective Computability Each step can be carried out.

    35. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 35 Incremental Development Start with problem statement: Write an assembler program for a traffic stop light. Decompose task into a few simpler subtasks. Turn on the green LED for 5 seconds. Blink the green LED on and off at 1 second intervals for 6 seconds (3 offs and 3 ons). Blink the green LED on and off at 0.25 second intervals for 4 seconds (8 offs and 8 ons). And finally, turn the green LED off for 10 seconds. Test, test, test Repeat the process of dividing into subtasks until you get to the machine instruction level.

    36. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 36 Systematic Decomposition

    37. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 37 Stoplight Example

    38. Assembly Instructions

    39. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 39 Add Source to Destination ADD Add source word or byte to destination Syntax ADD{.W or .B} src,dst Operation src + dst -> dst Description The source operand is added to the destination operand. The source operand is not affected. The previous contents of the destination are lost. Status Bits N: Set if result is negative, else reset Z: Set if result is zero, else reset C: Set if there is a carry, else reset V: Set if an arithmetic overflow, else reset Example ADD #10,R5 JC TONI ; Carry occurred ...... ; No carry

    40. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 40 Add Source/Carry to Destination ADDC Add source word or byte and carry to destination Syntax ADDC{.W or .B} src,dst Operation src + dst + C -> dst Description The source operand and the carry bit (C) is added to the destination operand. The source operand is not affected. The previous contents of the destination are lost. Status Bits N: Set if result is negative, else reset Z: Set if result is zero, else reset C: Set if there is a carry, else reset V: Set if an arithmetic overflow, else reset Example ADD.W @R13+,10(R13) ; ADD LSDs ADDC.W @R13+,10(R13) ; ADD 2/carry

    41. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 41 AND Source to Destination AND Source AND destination Syntax AND{.W or .B} src,dst Operation src .AND. dst -> dst Description The source operand and the destination operand are logically ANDed. The result is placed into the destination. Status Bits N: Set if result MSB is set, else reset Z: Set if result is zero, else reset C: Set if result is not zero, else reset V: Reset Example MOV #0AA55h,R5 ; Load mask AND R5,TOM ; mask M(TOM) JZ TONI

    42. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 42 Clear Bits in Destination BIC Clear bits in destination Syntax BIC{.W or .B} src,dst Operation .NOT.src .AND. dst -> dst Description The inverted source operand and the destination operand are logically ANDed. The result is placed into the destination. The source operand is not affected. Status Bits Status bits are not affected. Example BIC.W #0FC00h,LEO ; Clear 6 MSBs BIC.B #0F8h,LEO ; Clear 5 MSBs

    43. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 43 Set Bits in Destination BIS Set bits in destination Syntax BIS{.W or .B} src,dst Operation src .OR. dst -> dst Description The source operand and the destination operand are logically ORed. The result is placed into the destination. The source operand is not affected. Status Bits Status bits are not affected. Example BIS.W #003Fh,TOM ; set the 6 LSBs BIS.B #0E0h,TOM ; set the 3 MSBs

    44. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 44 Test Bits in Destination BIT Test bits in destination Syntax BIT{.W or .B} src,dst Operation src .AND. dst Description The source and destination operands are logically ANDed. The result affects only the status bits. The source and destination operands are not affected. Status Bits N: Set if MSB of result is set, else reset Z: Set if result is zero, else reset C: Set if result is not zero, else reset V: Reset Example BIT #0200h,R8 ; bit 9 of R8 set? JNZ TOM ; Y

    45. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 45 Subroutine Call CALL Subroutine Syntax CALL dst Operation dst -> tmp dst is evaluated and stored SP - 2 -> SP PC -> @SP PC updated to TOS tmp -> PC dst saved to PC Description A subroutine call is made to an address anywhere in the 64K address space. All addressing modes can be used. The return address (the address of the following instruction) is stored on the stack. The call instruction is a word instruction. Status Bits Status bits are not affected.

    46. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 46 Compare Source and Destination CMP Compare source and destination Syntax CMP{.W or .B} src,dst Operation dst + .NOT.src + 1 or (dst - src) Description The source operand is subtracted from the destination operand. The two operands are not affected and the result is not stored; only the status bits are affected. Status Bits N: Set if result is negative, else reset Z: Set if result is zero, else reset C: Set if carry from the MSB, else reset V: Set if an arithmetic overflow, else reset Example CMP R5,R6 ; R5 = R6? JEQ EQUAL ; YES, JUMP

    47. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 47 Jump Jxx Jump if carry set Syntax Jx label Operation If condition true: PC + 2 offset -> PC Description If condition is true, the LSB 10-bit signed offset contained in the instruction is added to the program counter. Else the next instruction following the jump is executed. Status Bits Status bits are not affected. Examples JC, JHS Jump if carry (C) = 1 JEQ, JZ Jump if zero (Z) = 1 JGE Jump if (N .xor. V) = 0 JL Jump if (N .xor. V) = 1 JMP Jump unconditionally JN Jump if negative (N) = 1 JNC, JLO Jump if carry (C) = 0 JNE, JNZ Jump if zero (Z) = 0

    48. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 48 Move Source to Destination MOV Move word or byte source to destination Syntax MOV{.W or .B} src,dst Operation src -> dst Description The source operand is moved to the destination. The source operand is not affected. The previous contents of the destination are lost. Status Bits Status bits are not affected. Example MOV #EDE,R10 ; Prepare pointer MOV #020h,R9 ; Prepare counter

    49. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 49 Push Source to Stack PUSH Push word or byte onto stack Syntax PUSH{.W or .B} src Operation SP - 2 ? SP src ? @SP Description The stack pointer is decremented by two, then the source operand is moved to the RAM word addressed by the stack pointer (TOS). Status Bits Status bits are not affected. Example PUSH R8 ; save R8 Note The system stack pointer (SP) is always decremented by two, independent of the byte suffix.

    50. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 50 Return from Interrupt RETI Return from interrupt Syntax RETI Operation TOS ? SR; SP + 2 ? SP TOS ? PC; SP + 2 ? SP Description The status register is restored to the value at the beginning of the interrupt service routine by replacing the present SR contents with the TOS contents. The stack pointer (SP) is incremented by two. The program counter is restored to the value at the beginning of interrupt service. The stack pointer (SP) is again incremented by 2. Status Bits N, Z, C, V: restored from system stack Mode Bits OSCOFF, CPUOFF, and GIE are restored from system stack.

    51. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 51 Rotate Right Arithmetically RRA Rotate word or byte right arithmetically Syntax RRA{.W or .B} dst Operation MSB ? MSB, MSB ? MSB-1, ... LSB+1 ? LSB, LSB ? C Description The destination operand is shifted right one position. The MSB is shifted into the MSB, the MSB is shifted into the MSB-1, and the LSB+1 is shifted into the LSB. Status Bits N: Set if result is negative, else reset Z: Set if result is zero, else reset C: Loaded from the LSB V: Reset Example RRA R5 ; R5/2 -> R5

    52. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 52 Rotate Right Through Carry RRC Rotate word or byte right through carry Syntax RRC{.W or .B} dst Operation C ? MSB ? MSB-1 .... LSB+1 ? LSB ? C Description The destination operand is shifted right one position. The carry bit (C) is shifted into the MSB, the LSB is shifted into the carry bit (C). Status Bits N: Set if result is negative, else reset Z: Set if result is zero, else reset C: Loaded from the LSB V: Reset Example SETC ; Prepare carry for MSB RRC R5 ; R5/2 + 8000h -> R5

    53. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 53 Subtract Source from Destination SUB Subtract word or byte source from destination Syntax SUB{.W or .B} src,dst Operation dst + .NOT.src + 1 -> dst Description The source operand is subtracted from the destination operand by adding the source operands 1s complement and the constant 1. The source operand is not affected. The previous contents of the destination are lost. Status Bits N: Set if result is negative, else reset Z: Set if result is zero, else reset C: Set if there is a carry, else reset Set to 1 if no borrow, reset if borrow. V: Set if an arithmetic overflow, else reset Note: The borrow is treated as a .NOT. Carry

    54. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 54 Subtract Source and Borrow from Destination SUBC Subtract source and borrow from destination Syntax SUBC{.W or .B} src,dst Operation dst + .NOT.src + C -> dst Description The source operand is subtracted from the destination operand by adding the source operands 1s complement and the carry bit (C). The source operand is not affected. The previous contents of the destination are lost. Status Bits N: Set if result is negative, else reset Z: Set if result is zero, else reset C: Set if there is a carry, else reset Set to 1 if no borrow, reset if borrow. V: Set if an arithmetic overflow, else reset

    55. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 55 Swap DestinationBytes SWPB Swap bytes Syntax SWPB dst Operation Bits 15 to 8 <-> bits 7 to 0 Description The destination operand high and low bytes are exchanged. Status Bits Status bits are not affected. Example The value in R5 is multiplied by 256. The result is stored in R5,R4. SWPB R5 ; swap bytes in r5 MOV R5,R4 ; save in r4 BIC #0FF00h,R5 ;Correct the result BIC #00FFh,R4 ;Correct the result

    56. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 56 Sign Extend Destination SXT Extend Sign Syntax SXT dst Operation Bit 7 -> Bit 8 ......... Bit 15 Description The sign of the low byte is extended into the high byte. Status Bits N: Set if result is negative, else reset Z: Set if result is zero, else reset C: Set if result is not zero, else reset V: Reset Example MOV.B &P1IN,R7 ; read port 1 SXT R7 ; sign extend to 16

    57. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 57 Exclusive OR Source w/Destination XOR Exclusive OR word or byte source with destination Syntax XOR{.W or .B} src,dst Operation src .XOR. dst -> dst Description The source and destination operands are exclusive ORed. The result is placed into the destination. The source operand is not affected. Status Bits N: Set if result MSB is set, else reset Z: Set if result is zero, else reset C: Set if result is not zero, else reset V: Set if both operands are negative, else reset Example XOR R6,TONI ; Toggle bits

    58. Emulated Instructions

    59. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 59 Add Carry to Destination ADC Add word or byte carry to destination Syntax ADC{.W or .B} dst Operation dst + C -> dst Emulation ADDC{.W or .B} #0,dst Description The carry bit (C) is added to the destination operand. The previous contents of the destination are lost. Status Bits N: Set if result is negative, else reset Z: Set if result is zero, else reset C: Set if dst was incremented from 0xFFFF to 0x0000, else reset V: Set if an arithmetic overflow, else reset Example ADD @R13,0(R12) ; Add LSDs ADC 2(R12) ; Add carry to MSD

    60. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 60 Branch to Destination BR Branch to destination Syntax BR dst Operation dst -> PC Emulation MOV.W dst,PC Description An unconditional branch is taken to an address anywhere in the 64K address space. All source addressing modes can be used. The branch instruction is a word instruction. Status Bits Status bits are not affected.

    61. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 61 Branch Examples BR #EXEC ; Branch to label EXEC ; ie. MOV @PC+,PC BR EXEC ; Branch to the address contained in EXEC ; ie. MOV X(PC),PC BR &EXEC ; Branch to the address contained in EXEC ; ie. MOV X(0),PC BR R5 ; Branch to the address contained in R5 ; ie. MOV R5,PC BR @R5 ; Branch to the address pointed to by R5. ; ie. MOV @R5,PC BR @R5+ ; Branch to the address pointed to by R5 ; and increment pointer in R5 afterwards. ; ie. MOV @R5+,PC BR X(R5) ; Branch to the address M(R5 + X) ; ie. MOV X(R5),PC

    62. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 62 Clear Destination CLR Clear word or byte destination Syntax CLR{.W or .B} dst Operation 0 -> dst Emulation MOV{.W or .B} #0,dst Description The destination operand is cleared. Status Bits Status bits are not affected. Example CLR TONI ; 0 -> TONI CLR R5 CLR.B TONI ; 0 -> TONI

    63. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 63 Clear Carry Bit CLRC Clear carry bit Syntax CLRC Operation 0 -> C Emulation BIC #1,SR Description The carry bit (C) is cleared. The clear carry instruction is a word instruction. Status Bits N: Not affected Z: Not affected C: Cleared V: Not affected Example CLRC ; clear carry RLC R5 ; rotate left R5

    64. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 64 Clear Negative Bit CLRN Clear negative bit Syntax CLRN Operation 0 ? N Emulation BIC #4,SR Description The constant 04h is inverted (0FFFBh) and is logically ANDed with the destination operand. The result is placed into the destination. The clear negative bit instruction is a word instruction. Status Bits N: Reset to 0 Z: Not affected C: Not affected V: Not affected

    65. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 65 Clear Zero Bit CLRZ Clear zero bit Syntax CLRZ Operation 0 ? Z Emulation BIC #2,SR Description The constant 02h is inverted (0FFFDh) and logically ANDed with the destination operand. The result is placed into the destination. The clear zero bit instruction is a word instruction. Status Bits N: Not affected Z: Reset to 0 C: Not affected V: Not affected

    66. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 66 Decrement Destination DEC Decrement destination word or byte Syntax DEC{.W or .B} dst Operation dst - 1 -> dst Emulation SUB{.W or .B} #1,dst Description The destination operand is decremented by one. The original contents are lost. Status Bits N: Set if result is negative, else reset Z: Set if dst contained 1, else reset C: Reset if dst contained 0, else set V: Set if an arithmetic overflow, else reset Example DEC R10 ; Decrement R10

    67. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 67 Double-decrement Destination DECD Double-decrement destination word or byte Syntax DECD{.W or .B} dst Operation dst - 2 -> dst Emulation SUB{.W or .B} #2,dst Description The destination operand is decremented by two. The original contents are lost. Status Bits N: Set if result is negative, else reset Z: Set if dst contained 2, else reset C: Reset if dst contained 0 or 1, else set V: Set if an arithmetic overflow, else reset Example DECD R10 ; Decrement R10 by 2

    68. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 68 Disable General Interrupts DINT Disable (general) interrupts Syntax DINT Operation 0 ? GIE or (0FFF7h .AND. SR ? SR Emulation BIC #8,SR Description All interrupts are disabled. The constant 08h is inverted and logically ANDed with the status register (SR). The result is placed into the SR. Status Bits Status bits are not affected. Note: If any code sequence needs to be protected from interruption, the DINT should be executed at least one instruction before the beginning of the uninterruptible sequence, or should be followed by a NOP instruction.

    69. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 69 Enable General Interrupts EINT Enable (general) interrupts Syntax EINT Operation 1 ? GIE or (0008h .OR. SR -> SR) Emulation BIS #8,SR Description All interrupts are enabled. The constant #08h and the status register SR are logically ORed. The result is placed into the SR. Status Bits Status bits are not affected. Note: The instruction following the enable interrupt instruction (EINT) is always executed, even if an interrupt service request is pending when the interrupts are enable.

    70. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 70 Increment Destination INC Increment destination word or byte Syntax INC dst or INC.W dst Operation dst + 1 -> dst Emulation ADD #1,dst Description The destination operand is incremented by one. The original contents are lost. Status Bits N: Set if result is negative, else reset Z: Set if dst contained 0FFFFh, else reset C: Set if dst contained 0FFFFh, else reset V: Set if dst contained 07FFFh, else reset Example INC.B STATUS

    71. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 71 Double-increment Destination INCD Double-increment destination Syntax INCD{.W or .B} dst Operation dst + 2 -> dst Emulation ADD{.W or .B} #2,dst Description The destination operand is incremented by two. The original contents are lost. Status Bits N: Set if result is negative, else reset Z: Set if dst contained 0FFFEh, else reset C: Set if dst contained 0FFFEh or 0FFFFh, else reset V: Set if dst contained 07FFEh or 07FFFh, else reset Example INCD R5 ; increment r5 by 2

    72. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 72 Invert Destination INV Invert destination word or byte Syntax INV{.W or .B} dst Operation .NOT.dst -> dst Emulation XOR{.W or .B} #0FFFFh,dst Description The destination operand is inverted. The original contents are lost. Status Bits N: Set if result is negative, else reset Z: Set if dst contained 0FFFFh, else reset Set if dst contained 0FFh, else reset C: Set if result is not zero, else reset V: Set if overflow, else reset Example INV R5 ; Invert R5, R5 = 0FF51h

    73. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 73 No Operation NOP No operation Syntax NOP Operation None Emulation MOV #0, R3 Description No operation is performed. The instruction may be used for the elimination of instructions during the software check or for defined waiting times. Status Bits Status bits are not affected. Examples MOV #0,R3 ; 1 cycle, 1 word JMP $+2 ; 2 cycles, 1 word MOV #100,R3 ; 2 cycles, 2 words

    74. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 74 Pop TOS to Destination POP Pop word or byte from stack to destination Syntax POP{.W or .B} dst Operation @SP -> temp SP + 2 -> SP temp -> dst Emulation MOV{.W or .B} @SP+,dst Description The stack location pointed to by the stack pointer (TOS) is moved to the destination. The stack pointer is incremented by two afterwards. Status Bits Status bits are not affected. Note: The system stack pointer (SP) is always incremented by two, independent of the byte suffix.

    75. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 75 Return from Subroutine RET Return from subroutine Syntax RET Operation @SP? PC SP + 2 ? SP Emulation MOV @SP+,PC Description The return address pushed onto the stack by a CALL instruction is moved to the program counter. The program continues at the code address following the subroutine call. Status Bits Status bits are not affected.

    76. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 76 Rotate Left Arithmetically RLA Rotate word or byte left arithmetically Syntax RLA{.W or .B} dst Operation C ? MSB ? MSB-1 .... LSB+1 ? LSB ? 0 Emulation ADD{.W or .B} dst,dst Description The destination operand is shifted left one position. The MSB is shifted into the carry bit (C) and the LSB is filled with 0. The RLA instruction acts as a signed multiplication by 2. An overflow occurs if the result has changed sign. Status Bits N: Set if result is negative, else reset Z: Set if result is zero, else reset C: Loaded from the MSB V: Set if an overflow, else reset

    77. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 77 Rotate Left Through Carry RLC Rotate word or byte left through carry Syntax RLC{.W or .B} dst Operation C ? MSB ? MSB-1 .... LSB+1 ? LSB ? C Emulation ADDC{.W or .B} dst,dst Description The destination operand is shifted left one position. The carry bit (C) is shifted into the LSB and the MSB is shifted into the carry bit (C). Status Bits N: Set if result is negative, else reset Z: Set if result is zero, else reset C: Loaded from the MSB V: Set if an arithmetic overflow, else reset

    78. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 78 Subtract Borrow from Destination SBC Subtract borrow (carry) from destination Syntax SBC{.W or .B} dst Operation dst + 0FFFFh + C -> dst Emulation SUBC{.W or .B} #0,dst Description The carry bit (C) is added to the destination operand minus one. The previous contents of the destination are lost. Status Bits N: Set if result is negative, else reset Z: Set if result is zero, else reset C: Set if there is a carry, else reset Set to 1 if no borrow, reset if borrow. V: Set if an arithmetic overflow, else reset Example SUB @R13,0(R12) ; Subtract LSDs SBC 2(R12) ; Subtract C MSD

    79. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 79 Set Carry Bit SETC Set carry bit Syntax SETC Operation 1 -> C Emulation BIS #1,SR Description The carry bit (C) is set. Status Bits N: Not affected Z: Not affected C: Set V: Not affected Example SETC ; set carry = 1

    80. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 80 Set Negative Bit SETN Set negative bit Syntax SETN Operation 1 -> N Emulation BIS #4,SR Description The negative bit (N) is set. Status Bits N: Set Z: Not affected C: Not affected V: Not affected Example SETN

    81. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 81 Set Zero Bit SETZ Set zero bit Syntax SETZ Operation 1 -> Z Emulation BIS #2,SR Description The zero bit (Z) is set. Status Bits N: Not affected Z: Set C: Not affected V: Not affected Example SETZ

    82. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 82 Test Destination TST Test destination word or byte Syntax TST{.W or .B} dst Operation dst + 0FFFFh + 1 Emulation CMP{.W or .B} #0,dst Description The destination operand is compared with zero. The status bits are set according to the result. The destination is not affected. Status Bits N: Set if destination is negative, else reset Z: Set if destination contains zero, else reset C: Set V: Reset Example TST R7 ; Test R7

    83. BYU CS/ECEn 124 Chapter 7 - MSP430 Assembler 83

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