Automated Synthesis and Modeling of Analog and Mixed-Signal Systems

1. Automated Synthesis and Modeling ofAnalog and Mixed-Signal Systems Alex Doboli, PhD Associate Professor Department of Electrical and Computer Engineering State University of New York, Stony Brook, NY 11794 Email: adoboli@ece.sunysb.edu

2. Mixed-Domain Embedded Systems Laboratory(http://www.ece.sunysb.edu/~vsdlab) • Analog and mixed-signal synthesis: • Heuristic optimization algorithms (many kinds) • Integer linear and nonlinear programming • Synthesis from VHDL-AMS • Automated modeling for design: • Automated modeling of analog circuits and systems • Modeling of process parameter variations • Linear and nonlinear symbolic methods • Statistical modeling • Compiled code simulation • Neural networks and PWL modeling

3. Mixed-Domain Embedded Systems Laboratory(http://www.ece.sunysb.edu/~vsdlab) • Synthesis of analog and mixed-signal circuits with high degree of innovation: • Understand the difference between human designed circuits and automatically synthesized circuits • Understand the level of innovation of new design solutions • Representation of design knowledge for innovation: • Classification scheme to show commonalities and differences • Management and reuse of existing IP • Synthesis method using the representation: • Process more similar to human design process (i.e. combination of existing design features)

4. integ integ DAC m m m Automated synthesis of analog and mixed-signal systems Topology generation and system architecture selection: VHDL-AMS specifications: entity aaa is … end entity; Performance evaluation Obtained performance Circuit and interconnect models Constraint transformation, floorplanning and global routing Performance evaluation (simulation)

5. Application-specific DS modulator topologies • H. Tang, A. Doboli, "High-Level Synthesis of Delta-Sigma Modulators Optimized for Complexity, Sensitivity and Power Consumption", IEEE Transactions on CAD of Integrated Circuits and Systems, Vol. 25, No. 3, pp. 597-607, 2006. • Automatically synthesize DS modulator topologies optimized for a given application (specification) • Novelty: • Synthesis methods for topology (no general method available) • New theoretical formulation • Advantages: • Global optimal solution is guaranteed (new topologies invented) • The methodology is scalable • The methodology could be fully automated

6. Generic topology for 3rd order modulator Chain of Integrators with Feedforward Summation Chain ofIntegrators with Distributed Feedback, Distributed Feedforward and Local Feedback Generic topology Chain of Integrators with Distributed Feedback

7. 9 signal paths 9 signal paths Optimal topology Minimum signal path (topology not unique)

8. Sensitivity cost function values are 1.723 and 2.250 respectively, with all (good case) L. Huelsman, “Active and Passive Analog Filter Design”, McGraw Hill, 1993 Optimal topology Minimum sensitivity

9. Topology from Toolbox Sensitivity cost function values is 4.454, with some terms larger than 1.0, e.g. R. Schreier, “The Delta-Sigma Toolbox 6.0”, www.mathworks.com/matlabcentral/fileexchange, Nov 2003.

10. Design Specifications Synthesis of Reconfigurable DS Modulators Y. Wei, H. Tang, A. Doboli, "Systematic Methodology for Designing Reconfigurable Delta Sigma Modulator Topologies for Multimode Communication Systems", invited paper, IEEE Transactions on CADICS, Vol. 26, No. 3, March 2007. A cell phone chip works for CDMA, GSM, UMTS … …

11. Reconfigurable DS modulator topologies Topology opt1

12. Experiments • Compare the triple-mode modulator with three single-mode modulators obtained with DS toolbox • Design effort can be less than 1/3 • Complexity can be as less as 40% • Power saving can be as large as 24.2% • More robust to circuit nonidealities

13. SNR degradation due to circuit noise Improvement as compared to the state-of-art design: 3dB for the case of -60dB noise level 5dB for the case of -50dB noise level

14. Experiments

15. Algorithms for Analog Synthesis H. Tang, H. Zhang, A. Doboli, "Refinement based Synthesis of Continuous-Time Analog Filters Through Successive Domain Pruning, Plateau Search and Adaptive Sampling", IEEE Transactions on CAD of Integrated Circuits and Systems, Vol. 25, No. 8, pp. 1421-1440, 2006. 3rd order elliptic lowpass filter • Synthesis problem: • Find circuit constraints and system parameters so that functionality isachieved, and multiple performance attributes are optimized

16. Slow convergence Cost=6 plateau Plot 2 Convex region Plot 3 Plot 1 oscillation Large sampling steps (20,20 sec) Cost=3000 Small sampling steps (5,000,6hours) • Plot 1: smaller variable ranges is good • Plot 2: different types of regions: convex regions mixed with plateaus • Plot 3: adaptive sampling for buried optima

17. Experiments

18. Experiments (DS ADC) SA Plateau search

19. Automated Macromodeling Y. Wei, A. Doboli, "Structural Macromodeling of Analog Circuits through Model Decoupling and Transformation", IEEE Transactions on CADICS, Vol. 27, No. 4, April 2008. • Produced macromodels: • Structural • No feedback dependencies (decoupled) • Symbolically characterized nonlinear current sources • Extensible, accuracy is controllable • Insight into circuit • Reusable

20. Structural nonlinear macromodel Circuit netlist (R2,C2) vin vout f(vin) Black-box macromodel Automated Macromodeling

21. Circuit netlist Automated Macromodeling

22. Comparison of HD2, HD3 Automated Macromodeling

23. Automated Macromodeling

24. Automated Macromodeling

25. Automated Macromodeling

26. Automated Macromodeling

27. Process Variation Modeling H. Zhang, A. Doboli, "A Scalable Sigma-Space Based Methodology for Modeling Process Parameter Variations in Analog Circuits", Microelectronics Journal, Elsevier, February 2009.

28. The limitation of the SA Method • “Statistical Modeling for Computer-Aided Design of MOS VLSI Circuits”, Christopher Michael and Mohammed Ismail, Kluwer Academic Publishers, 1993

29. Process Variation Modeling Method

30. Experimental Results

31. Experimental Results

32. Modeling and Fast Simulation of Nonlinear Systems H. Zhang, S. Doboli, H. Tang, A. Doboli, "Compiled Code Simulation of Analog and Mixed-Signal Systems Using Piecewise Linear Modeling of Nonlinear Parameters", Integration the VLSI Journal, Elsevier, Vol. 40, No. 3, pp. 193-209, 2007. • At the system-level, the method uses symbolic descriptions of ADCs • Building blocks are macromodels, which include circuit non-idealities and nonlinear behavior. • Non-linear parameters are expressed using PWL models, which are created automatically through model extraction from trained neural networks (NN) . • Method is more accurate than simulation of behavioral models • Method is significantly faster than numerical simulation (two orders of magnitude) • Accuracy is not traded-off for speed • Simulator code can be optimized to avoid convergence problems

33. Model abstraction Level selection Connection pattern recognition Modified nodal analysis PWL segment control flow generation Code optimization Code generation Lazy generation of symbolic expression Simulation Methodology - overview Topology GIT library PWL MM library DDDs APTs Terminal block analysis Middle block analysis Code generation and optimization Compiled-code simulator

34. Structure of 3rd-order Single-loop - Modulator

35. SD ADC order Spectre + VerilogXL(s) Symbolic (s) Speed-up 1 507.1 3.5 144.88 2 533.9 5.88 90.79 3 852.3 8.24 103.43 4 1284.9 10.69 120.19 5 1752.0 12.91 135.70 Simulation Results Comment: Because of the extreme values of some parameters, we had severe convergence problems in Cadence Mixed-Signal Simulation Environment (Spectre + Verilog A).

36. Conclusions • Automated synthesis of analog and mixed-signal synthesis: • Heuristic optimization algorithms (all kinds) • Integer linear and nonlinear programming • Stochastic methods (Markov chains, dynamic programming) • Automated modeling for design: • Automated modeling of analog circuits and systems • Modeling of process parameter variations • Linear and nonlinear symbolic methods • Statistical modeling • Compiled code simulation • Neural networks and PWL modeling

37. Towards Creative Analog Synthesis: A Symbolic Representation for Exploring Circuit Operation Principles cferent@ece.sunysb.edu Cristian Ferent and Alex Doboli

38. Motivation, Goals, and Contributions • Systematically characterize a collection of designs: • Implement performance specific circuit models • Highlight common & different features between circuits • Identify advantages & limitations of a circuit compared to others • Derive conditions under which design alternatives exhibit similar performance

39. Motivation, Goals, and Contributions (II) • Model to characterize transconductor linearity • Illustrate mechanisms which can enhance circuit performance: extended operating range and/or device non-linearity compensation

40. Motivation, Goals, and Contributions (III) • Automatically produce circuit classification schemes: • Build a model to express main similarities & differences between a set of circuits implementing the same functionality • Based on topological structures of features that influence the performance of a design • Produce compact classification – minimum of separation criteria

41. Problem Description: concept representation Coupling between nodes Classification along curve D1 Features related to performance Circuit node Similar node features Distinguishing criteria curves C. Ferent, A. Doboli, "A Symbolic Technique for Automated Characterization of the Uniqueness and Similarity of Analog Circuit Design Features", DATE 2011

42. Proposed Method: automated generation of classification schemes • Produce the separation criteria for a given performance • Determine best separation criteria • Construct hierarchical classification scheme

43. Algorithm Details • Build performance-based circuit models 2) Group nodes with similar behavior: • Minimize total number of matched groups (N ) • Minimize matching error within groups of nodes • Identify constraints under which matching is valid

44. Algorithm Details (II) 3) Sort matched groups: • Signal path tracing and model decoupling algorithms 4) Use entropy to rank similarities and differences between circuits: • N – number of circuits represented in cluster Ck • pi – probability a circuit from cluster Ck is associated with matched group Gj 5) Produce hierarchy with maximum matching at higher levels

45. AC Domain Model Matching: amplifier circuits hierarchical classification Increasing entropy value Similar behavior Common structures Different structures Different behavior

46. Classification correlation with performance • Also identify number of terms that differ between node structures • Indication of topology’s flexibility to satisfy performance (e.g. setting pole and zero positions)

47. Transconductor Linearity Models Extend range Correct linearity

48. Linearity Model Matching: transconductors hierarchical classification Common structures Identical Processing Path Additional Processing Different structures

49. Linearity Model Matching: (II)transconductors hierarchical classification Identical Control Path Additional Control Additional Control Voltages

50. Current Developments • Apply the proposed methodology for a set of 10 state-of-the-art amplifier designs • Derive topological and performance classification schemes