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Unified Approach to the Design of Modulo-(2 n ± 1) Adders Based on Signed-LSB Representation of Residues. Behrooz Parhami Dept. Electrical & Computer Engr. Univ. of California, Santa Barbara, USA parhami@ece.ucsb.edu. Ghassem Jaberipur Dept. Electrical & Computer Engr.
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Unified Approach to the Design of Modulo-(2n ± 1) Adders Based on Signed-LSB Representation of Residues • BehroozParhami • Dept. Electrical & Computer Engr. • Univ. of California, Santa Barbara, USA • parhami@ece.ucsb.edu Ghassem Jaberipur Dept. Electrical & Computer Engr. Shahid Beheshti Univ., Tehran, Iran jaberipur@sbu.ac.ir 19th IEEE International Symposium on Computer Arithmetic Portland, Oregon, USA, June 8-10, 2009
Outline • Introduction • Background • Signed-LSB Representation • New Modulo-(2n ± 1) Adders • Mod-(2n + 1) Adder • Mod-(2n – 1) Adder • Conversion from/to Binary • Comparisons & Applications • Conclusion
Introduction • Renewed interest in RNS arithmetic • Separate designs for mod-(2n ± 1) and mod-2n • Error-prone and labor-intensive optimizations • New signed-LSB representation of residues • Sole use of standard arithmetic building blocks • Greater confidence in correctness • Configurable RNS processor for fault tolerance
Background: Mod-(2n – 1) Addition • Mod-m: • Mod-(2n–1):
Background: Mod-(2n – 1) Adders • Kalamboukaset al., 2005 RPP modulo 255 adder TPP modulo 255 adder
Background: Mod-(2n + 1) Addition • Mod-(2n+1): • W' is difficult to compute, therefore, let
Background: Mod-(2n + 1) Adders • Efstathiou, et al., 2004 Flaw: Sn is wrong
Background: Mod-(2n + 1) Adders • The corrected mod-257 TPP adder • More area • Same Latency
Background: Dim-1 Representation • Diminshed-1 mod-(2n+ 1)
Signed-LSB Representation • Faithful representation of [–1, 2n – 1] • Problem: Mixed posibits and negabits: A + B
Universal Full Adders • Full adder can compress mixed posibits and negabits ||X1 + X2 + x3|| = X1 – 1 + X2 – 1 + x3 = 2c + s – 2 = ||2C + s||
Weighted representation Conversion from/to Binary • Conversion of input to residue representation is very simple • Fast residue-to-binary converters implement the Chinese remainder theorem via CSAs Signed-LSB representation Weighted representation
Applications • Fault-tolerant RNS processor
Conclusion • Implementing mod-(2n – 1) and mod-(2n + 1) addition using generic CSA and binary adders • Easier/faster exploration of the design space • Simpler testing and verification • Greater confidence in design correctness • Configurable modular adders (fault tolerance) • Potential for less complex modular subtractors and modular multipliers
Questions?The authors gratefully acknowledge the assistance of Mr. SaeedNejati and Ms. HaniehAlavi.G. Jaberipur also acknowledges support from IPM School of Computer Science and from ShahidBeheshti University.Supplement at: www.ece.ucsb.edu/~parhami/publications.htm