High-Assurance Security on HPEC Systems: A Viable Approach or an Impossible Ideal?
This presentation explores the complexities of achieving high-assurance security and safety in High-Performance Embedded Computing (HPEC) systems. Drawing on joint research from leading organizations, including the Air Force, Army, Navy, and industry giants like Boeing and Lockheed Martin, it discusses the Military Information Assurance Level System (MILS) architecture. The goal is to enhance scrutiny and reduce the amount of security-critical code. Key concepts include damage limitation, information flow, mathematical verification, and secure communication channels within real-time systems.
High-Assurance Security on HPEC Systems: A Viable Approach or an Impossible Ideal?
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Presentation Transcript
High-Assurance Security/Safety on HPEC Systems: an Oxymoron? HPEC Poster 30-SEP-2004 W. Mark Vanfleet Senior NSA/IAD Security Analyst wvanflee@restarea.ncsc.mil Bill Beckwith Objective Interface Systems CEO/CTO bill.beckwith@ois.com This presentation represents joint research between the Air Force, Army, Navy, NSA, Boeing, Lockheed Martin, Objective Interface, Green Hills, LynuxWorks, Wind River, GD, Rockwell Collins, MITRE, U of Idaho
The Whole Point of MILS Really simple: • Dramatically increase the scrutiny of security critical code • Dramatically reduce the amount of security critical code High-Assurance, Real-Time MILS Architecture
Orange Book vs.MILS Architecture Network I/O File systems Device drivers MAC Auditing DAC Monolithic Applications User Mode Monolithic Kernel Damage Limitation Periods Processing Information Flow Data isolation Privilege Mode Kernel High-Assurance, Real-Time MILS Architecture
Orange Book vs.MILS Architecture CSCI (Main Program) Mathematical Verification Network I/O File systems Device drivers MAC Auditing DAC User Mode Middleware Partitioning Kernel Information Flow Data isolation Privilege Mode Periods Processing Damage Limitation Kernel High-Assurance, Real-Time MILS Architecture
PartitioningCommunication System Zero-copy Secure Communications Channel A C PCS PCS F D B High-Assurance, Real-Time MILS Architecture
Partitioning the Channel A B MILS Rapid-IO C D E F High-Assurance, Real-Time MILS Architecture