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Ductile Regime Nano-Machining of Silicon Carbide John A Patten, Director Manufacturing Research Center Western Michigan University. Introduction Research Background Determination of Ductile to Brittle Transition (DBT) depth for Chemically Vapor Deposited (CVD) Silicon Carbide (SiC)

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  1. Ductile Regime Nano-Machiningof Silicon CarbideJohn A Patten, DirectorManufacturing Research CenterWestern Michigan University

  2. Introduction Research Background Determination of Ductile to Brittle Transition (DBT) depth for Chemically Vapor Deposited (CVD) Silicon Carbide (SiC) Single Point Diamond Turning (SPDT) of CVD coated SiC Conclusion Future Work AGENDA

  3. Defining important terms: High Pressure Phase Transformation Nano – Machining Ductile Regime Ductile to Brittle Transition Depth INTRODUCTION

  4. PROJECT GOALS CVD coated SiC • Determination of DBT depths for two different kinds of material, one from Coors Tek other from Poco Graphite • Develop process parameters for diamond turning of CVD SiC • Achieve SPDT of 6 inch CVD coated SiC plate • Minimize tool wear using cutting fluids

  5. DETERMINATION OF DUCTILE TO BRITTLE TRANSTION DEPTH (DBT) FOR CHEMICALLY VAPOR DEPOSITED (CVD) SILICON CARBIDE (SiC)

  6. DETERMINATION OF DBT DEPTH FOR CVD coated SiC Experimental set up: Load Sensor Flat nose single crystal diamond toolwith holder AE Sensor Diamond Stylus with holder CVD coated SiC Set up for scratching experiment using diamond stylus Leveling Stage Set up for inclined plane experiment using flat nose tool

  7. DETERMINATION OF DBT DEPTH FOR CVD coated SiC Table showing the time line of experiments to account for tool wear:

  8. DETERMINATION OF DBT DEPTH FOR CVD coated SiC Scratching using 5µm diamond stylus: Scratching parameters Tool: Diamond Stylus with 5 µm radius Speed: 0.005 mm/sec Scratch length: 5 mm Load Range: 10 to 25 grams for Poco Graphite sample and 1 to 10 grams for Coors Tek Polished Samples used Poco Graphite CVD coated SiC surface roughness of <100 nm (Ra)

  9. DETERMINATION OF DBT DEPTH FOR CVD coated SiC Wyco image of scratch of Poco Graphite sample using 5 µm diamond stylus

  10. DETERMINATION OF DBT DEPTH FOR CVD coated SiC Inclined plate experiment: Scratching parameters Tool: Flat nose single crystal diamond tool with -45 degree rake angle Speed: 0.005 mm/sec Scratch length: 5 mm Load Range: 10 to 25 grams Polished Samples used Poco Graphite CVD coated SiC surface roughness of <10 nm (Ra)

  11. DETERMINATION OF DBT DEPTH FOR CVD coated SiC Schematic representation of inclined plane experiment geometry for Poco Graphite sample

  12. DETERMINATION OF DBT DEPTH FOR CVD coated SiC SEM of the failed tool edge used for inclined plane experiment Wyco image of scratch on Poco Graphite using inclined plane experiment Force plot of scratch on Poco Graphite using inclined plane experiment

  13. DETERMINATION OF DBT DEPTH FOR CVD coated SiC Scratching details for CVD coated SiC: Scratching parameters Tool: Diamond stylus 12.5 µm tip radius Speed: 0.005 mm/sec Scratch length: 5 mm Load Range: 80 to 120 grams Polished Samples used Poco Graphite CVD coated SiC surface roughness of <10 nm (Ra)

  14. DBT depth = 550 nm DBT depth DETERMINATION OF DBT DEPTH FOR CVD coated SiC DBT depth for Poco Graphite Sample: SEM of the used 12.5 micron diamond stylus for Poco Graphite sample Wyco image for DBT depth of Poco Graphite sample using 12.5 µm stylus Force and AE plot for DBT depth of Poco Graphite sample using 12.5 µm stylus

  15. DETERMINATION OF DBT DEPTH FOR CVD coated SiC Optical image of a typical DBT transition in a scratch

  16. SINGLE POINT DIAMOND TURNING (SPDT) OF CHEMICALLY VAPOR DEPOSITED (CVD) SILICON CARBIDE (SiC)

  17. SPDT of CVD coated SiC Experimental set up: Cutting Direction Coolant System Blown up image of the tool and sample set up Experimental set up for SPDT of CVD SiC

  18. SPDT of CVD coated SiC Machining parameters Tool: Round nose single crystal diamond tool with nose radius 3 mm with -45 degree rake and 5 degree clearance angle Depth of cut: 500 nm Feed/rev: 1 µm/rev Spindle speed: 60 rpm Cutting speed: 0.24 mm/sec Feed Speed: 0.001 mm/sec Programmed load: 8.22 grams

  19. SPDT of CVD coated SiC Surface Finish: Picture showing the optical quality of the surface finish of the machined CVD SiC CAD model showing the surface roughness distribution for 6 inch CVD SiC plate

  20. 100 X 100 X SPDT of CVD coated SiC Wyco image of the machined Surface (region 2) Optical image of the unmachined surface Optical image of the machined surface (region 1) Wyco image of the unmachined surface Wyco image of the machined Surface (region 1) Optical image of the machined surface (region 2) showing feed marks

  21. SPDT of CVD coated SiC Schematic of the chip profile for area calculations during SPDT Weight required for 500 nm depth of cut: Chip cross-sectional area, Ac= 2.4898 x 10-7 mm2 Cutting force, Fx = Esc x Ac= 8.19 x 10-3 N COF = 0.1 (assumed from previous work) Thrust Force, Fz = 8.19 x 10-2 N Weight required, w = 8.19 grams *All areas are calculated using MATLAB program

  22. SPDT of CVD coated SiC Table showing actual Vs Programmed depth of cut:

  23. SPDT of CVD coated SiC Comparison of depth of cut and achieved surface roughness data

  24. SPDT of CVD coated SiC Ongoing work: Note: Machining parameters and the kind of tool used are same as used for SPDT of 6 inch Poco Graphite sample.

  25. SUMMARY of SCRATCHING EXPERIMENTS

  26. SUMMARY OF scratching EXPERIMENTS

  27. VALIDATION OF scratching RESULTS Formula used for validation: If 2a – width of the scratch (derived from Y-profiles of wyco image) R – radius of the tool used d – depth of the scratch (derived from Y-profiles of wyco image) Then R = {(a2/d)+d}/2

  28. VALIDATION OF scratching RESULTS

  29. CONCLUSION AND FUTURE WORK

  30. The ductile to brittle transition depth (DBT depth), or critical depth of cut, for the CVD coated SiC from Poco Graphite Inc. was found to be 550 nm SPDT of CVD SiC was done at depths of 500 nm for ductile regime machining CONCLUSIONS

  31. Measuring the tool radius (cutting edge) of the single crystal diamond tool before and after machining of CVD SiC, to map the tool wear ratio SPDT of CVD SiC in a displacement based machine (precision lathes) where there is direct control over the depths of cut or in-feeds used for machining The potential replacement of intermediate processes like finish grinding, polishing and lapping, by SPDT, would reduce the total manufacturing cost by increasing productivity and improving surface form accuracy (flatness) FUTURE DEVELOPMENTS

  32. I would like to express my acknowledgements to Third Wave Systems and the National Science Foundation for having funded this work ACKNOWLEDGEMENTS

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