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Ideas for a Fast-Track trigger processor - FTK

FAST-TRACK COLLABORATION Offline-quality tracks @LHC Level 1 output rate. Ideas for a Fast-Track trigger processor - FTK. ... an evolution of the CDF Silicon Vertex Trigger (SVT) A. Annovi for the Fast-Track group. Work during 1998-2003: INFN, University of Pisa, SNS - Pisa

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Ideas for a Fast-Track trigger processor - FTK

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  1. FAST-TRACK COLLABORATION Offline-quality tracks @LHC Level 1 output rate Ideas for a Fast-Track trigger processor - FTK ... an evolution of the CDF Silicon Vertex Trigger (SVT) A. Annovi for the Fast-Track group Work during 1998-2003: INFN, University of Pisa, SNS - Pisa University of Chicago University of Geneva Co-operating on standard cell AMChip: INFN, University of Ferrara FTK meeting - September 30, 2004

  2. Outline • Fast-Track working principles • FTK performances overview • speed & size • track quality • FTK can grow with the experiment • Proposed plan • Possible applications andphysics reach: • b-tagging • e/t selection More details on Trans. on Nucl. Sci. papers: http://www.pi.infn.it/~orso/ftk FTK meeting - September 30, 2004

  3. 30 minimum bias events + H->ZZ->4m Online tracking: a tough problem Where is the Higgs? m m m m Tracks with Pt>2 GeV FTK 30 minimum bias events + H->ZZ->4m Where is the Higgs? m m Help! m FTK meeting - September 30, 2004 m Tracks with Pt>2 GeV

  4. Where could we insert FTK? 2nd output 1st output CALO MUON TRACKER Very low impact on DAQ PIPELINE LVL1 Ev/sec = 50~100 kHz ROD FE FE Fast Track + few (Road Finder) CPUs high-quality tracks: Pt>1 GeV Buffer Memory Buffer Memory Raw data ROBs Track data ROB Fast network connection No change to LVL2 CPU FARM (LVL2 Algorithms) FTK meeting - September 30, 2004

  5. Tracking in 2 steps Roads • Then track fitting inside roads. • Thanks to 1st step it is much easier. • Find low resolution track candidates called “roads”. Solve most of the combinatorial problem. FTK meeting - September 30, 2004

  6. 1st step: pattern recognition with the Associative Memory (AM) The Pattern Bank ... SVT’s AMChip • Dedicated device with • maximum parallelism • Store all patterns corresponding • to interesting tracks • Road search happens during • detector readout • How to send all hits to the AM? FTK meeting - September 30, 2004

  7. Feeding FTK @ 50KHz event rate Pixels barrel SCT barrel Pixels disks Simple configuration for the beginning ATLAS Pixels + SCT Divide into f sectors 1/2f AM Allow a small overlap for full efficiency 1/2f AM 6 buses 40MHz/bus 6 Logical Layers: full h coverage FTK meeting - September 30, 2004

  8. How many AM partitions @ low lum? Ev/sec 50kHz AM input bandwidth = 40 MHz cluster/bus AM input buses = 6 Logical layer <cluster/event> cluster rate Pix 0 1300 64 MHz Pix 2 + extra 1200 61 MHz SC0 + extra 1000 50 MHz SC1 + extra 1300 65 MHz SC2 + extra 1200 61 MHz SC3 + extra 1300 64 MHz ATLAS-TDR-11 2 FTK processors working in parallel for the whole Pix+Si tracker More processors as a backup option FTK meeting - September 30, 2004

  9. Inside Fast-Track ~75 9U VME boards – 4 types Pixels & SCT PIPELINEDAM overlap regions EVENT # 1 RODs EVENT # N 50~100 KHz event rate AM-board HITS Data Formatter (DF) DO-board S-links SUPER BINS DATA ORGANIZER ROADS GB cluster finding split by logical layer Few CPUs ROADS + HITS CORE 2nd step: track fitting ~Offline quality Track parameters Raw data ROBs Track data ROB FTK meeting - September 30, 2004

  10. proposed R&D program • Soon: in order to have the FTK in the future the • only short term issue is the availability • of the dual output HOLA. (also useful • for diagnostic and commissioning) • Alternative: use optical splitters • 2008: @ very low luminosity • minimal R&D FTK system • very cheap using low density CDF AMChip • (barrel only: ~40 boards) • 2009 ?: increase the R&D system to include disks • new AMChip for 2*1033 lumi • (barrel+disks: ~75 boards) • 2011 ?: upgrade for high lum. 2nd output 1st output FTK meeting - September 30, 2004

  11. DO0 DO2 DO3 DO5 DO4 DO1 How FTK core will look like? O(50 106) patterns 128 AMChips /board • ~offline quality tracking 50 kHz event (2*1033 lumi) • 2 core crates • + 3DF crates AM-B0 AM-B7 AM-B8 AM-B2 AM-B3 AM-B4 AM-B5 AM-B6 AM-B1 CPU0 CPU2 CPU3 CPU1 Ghost Buster FTK INPUT CUSTOM BACKPLANE FTK meeting - September 30, 2004

  12. Thin Road Width (rf z): pixel 1mm6.5cm Si 3mm12.5cm Medium Road Width: pixel 2mm6.5cm Si 5mm12.5cm Large Road Width: pixel 5mm6.4cm Si 10mm12.5cm These kind of tracks have not been studied. BUT we can do the exercise again. Pattern Bank generation ATLAS Barrel (~CERN/LHCC97-16) 7 layers: 3 Pixel + 4 m strip (no stereo) Cylindrical Luminosity Region: R=1mm, Dz=±15cm Generate tracks (Pt>1 GeV) & store NEW patterns The Associative Memory can store any kind of tracks: Conversions, delta-rays, ks decays … Including them just requires a lager Associative Memory 15M patterns FTK meeting - September 30, 2004

  13. Track fitting workload Low luminosity: 2*1033 <Nfit/road> large thin thin large 13 comb x 34 roads= 440 comb/track QCD Pt>40 1.4 fit x 4 roads = 6 comb/track QCD Pt10 2.3 fit x 6 roads = 14 comb/track QCD Pt40 7.8 fit x 9.5 roads = 74 comb/track QCD Pt100 27 fit x 25 roads = 658 comb/track QCD Pt200 Fit/trka<Nfit/Road>x<Nroads/track> FTK meeting - September 30, 2004

  14. Timing Performances Step 2: Software Linear Fit Pt 200 Pt 100 Pt 40 Pt 10 Nfit/trk 658 74 14 6 Ntrk/ev 17 16 10 8 L1 Trig jet jet soft jet soft m L1 Rate <100Hz <3KHz ~5KHz ~40KHz Fits/sec <1.1MHz <3MHz 750KHz 3MHz 8MHz only 8 CPUs (barrel) PIII 800MHz Pulsar TF fit/s 10 MHz Pulsar TF + new mez. fit/s >30 MHz fit/s 1.1 MHz Latency Test Htt 130 comb/trk 34 trk/ev <latency> = 1ms max latency = 100ms FTK meeting - September 30, 2004

  15. Is 2nd step as good as offline? • Track finding within a road is fast • Fitting in linear approximation • Testing the linear fit with a fast • simulation of ATLAS Silicon Tracker Track parameter residuals: s(d0) = 17 mm c2/N ATLAS Genova: M. Cervetto, P. Morettini, F. Parodi, C. Schiavi, presented on 20-Nov-2002 at PESA FTK meeting - September 30, 2004

  16. Raw data ROBs FTK R&D status AMChip AMBoard Data Organizer Ghost Buster Track Fitter TODO: Data Formatter board Pixel cluster finder Pixels & SCT RODs 2 “core” crates: road finding track fitting 3 DF crates: cluster finding split by layer S-links Track data ROB FTK meeting - September 30, 2004

  17. TODO list • DF board have some ideas • Pixel cluster finder need R&D work • AMChip new design for 2*1033 lumi • AMBoard modify prototype • Data Organizer modify prototype / new R&D • Ghost Buster Pulsar ?? • Track Fitter CPU or FPGA ??? • FTK simulation needed for design studies FTK meeting - September 30, 2004

  18. FTK R&D status FTK AMBoard Modifing it for CDF SVT upgrade Will learn from CDF experience then modify it for ATLAS FTK Data Organizer 1st prototype never fully tested Need a lot of RAM on board Buffers up to 16 events more complex than SVT HB FTK meeting - September 30, 2004

  19. How to use Fast-Track to capture as much PHYSICS as possible b b e t b t FTK m b b t h e t Hard life for all LVL2 objects! FTK meeting - September 30, 2004

  20. Offline-quality b-tagging for events rich in b-quarks bbH/A bbbb tt qqqq-bb ttH qqqq-bbbb H/A tt qqqq-bb H hh bbbb H+- tb qqbb Z0 bb Ru Calibration sample 1000 100 ATLAS TDR-016 10 eb 0.6 with Fast-Track offline b-tag performances early in LVL2 ATL-DAQ-2000-033 FTK meeting - September 30, 2004

  21. Triggers w/o and with FTK J200 3J90 4J65 0.2 0.2 0.2 j400 3j165 4j110 25 MU6 + J25 + J10 (|h|<2.5) 2.6 2 b-tags + Mbb > 50 160 mini ev. “ “ 3 b-tags 4 ATLAS + FTK SE200 + J70 + J50 + J15 (|h|<2.5) 4 2 b-jets + Mbb > 50 50 mini ev. “ “ 3b leading 1 CMS Inclusive b-jet b-jet 237 5 Scenario: L= 2 x 1033deferral LVL1 selection LVL1 rate (kHz) HLT selection HLT rate (Hz) MU20 2MU6 0.8 0.2 m20 2m10 40 F. Gianotti, LHCC, 01/07/2002 & CMS TDR 6 ATLAS ATL-COM-DAQ-2002-022 FTK meeting - September 30, 2004

  22. bbH/A  bbbb ATL-COM-DAQ-2002-022 ATLAS + FTK triggers As efficient as offline selection: full Higgs sensitivity LVL1 LVL2 Effic. MU6+ 2J 3 b-tags 8% 3J + SE200 3b leading 13% Analysis: 4 b-jets|hj|<2.5 PTj> 70, 50, 30, 30 GeV efficiency 10% tanb ATLAS-TDR-15 (1999) Effect of trigger thresholds (before deferrals) 200 MA (GeV) FTK meeting - September 30, 2004

  23. Electron Identification With FTK tracks are ready on the shelf: using tracks could be even faster than using calorimeter raw data! L2 tracking Efficiency & jet rejection could be enhanced by using tracks before calorimeters. ATLAS Swapping trigger algorithms can reduce trigger rate while increasing efficiency! CERN/LHCC/2000-17 EF tracking FTK meeting - September 30, 2004

  24. HLT t selection @ CMS H(200,500 GeV)  tt, t  1,3h± + X 1. 0.9 0.8 0.7 0.6 0.5 0.4 0.004 0.007 Efficiency & jet rejection could be enhanced by using tracks before calorimeters. L=2x1033 cm-2 sec-1 mH=500 mH=200 Staged-Pix tau on first calo jet e (H(200,500 GeV)  tt, t  1,3h+X) Pix tau on first calo jet TRK tau on first calo jets TRK tau on both calo jets Calo tau on first jet 0 0.02 0.06 0.1 0.14 e (QCD 50-170 GeV) FTK meeting - September 30, 2004

  25. Conclusion • FTK canfind offline quality tracks @LVL1 output rate! • FTK is very compact: 2 “core” crates + 3 DF’s crates (for a first barrel only R&D system) • More efficient LVL2 triggers: • Lower LVL1 & LVL2 thresholds and • save CPU power! • b-jet, t-jet tagging at rates 10-20 KHz: • more Higgs physics ! FTK meeting - September 30, 2004

  26. Z0  b-bbar Important b-jet calibration tool 2fb-1 Events (S/ÖB = 35) Mbb(GeV) LVL1 LVL2 S/ÖB ATLAS + FTK 20fb-1 MU6+ 2J Mbb > 50  60 ATL-COM-DAQ-2002-022 3J + SE200 Mbb > 50  20 Cdf/anal/top/cdfr/4158 Events CDF RunII pseudo exp. (with SVT) Mbb(GeV) FTK meeting - September 30, 2004

  27. FTK & experiment simulation • Standalone program to produce hits from tracks; it includes: • multiple scattering • ionization energy losses • detector inefficiencies • resolution smearing • primary vertex smearing: sxy=1mm sz=6cm • Detector hits generated from: (Pythia) • QCD10 sample: QCD Pt>10 GeV L1 m6 • QCD40 sample: QCD Pt>40 GeV L1 soft jet • QCD100 sample: QCD Pt>100 GeV L1 jet • QCD200 sample: QCD Pt>200 GeVL1 jet • all samples + noise + <5 MB>. Road finding 6 layers/7(FTK simulation) FTK meeting - September 30, 2004

  28. FTK Basic Architecture • Pattern recognition with Associative Memory (AM) • using up to 12 layers no need for initial seed • highly parallel algorithm • using coarser resolution to reduce memory size Hits Associative Memory Data Organizer Hits Roads Track Fitter Roads + hits Tracks parameters (d, pT, , h, z) • Track fitting • using full resolution of the detector Use CPUs for maximum flexibility FTK meeting - September 30, 2004

  29. Timing Performances Step 1: Pattern Recognition • Hardware + CPU: • 4 AM (40M patterns) • 8 CPUs • Ev/sec 50KHz Barrel Software future: better algorithms (region of interest) • AM Simulation: • 107 CPUs • Ev/sec 50 KHz FTK meeting - September 30, 2004

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