1 / 8

Nanowire Size Dependency on TSNWFET

Nanowire Size Dependency on TSNWFET. Ref.: S. D. Suk et al ., “Investigation of nanowire size dependency on TSNWFET”, IEDM Tech. Dig ., pp. 891-894, 2007. Xin Sun April 16, 2008. Introduction. Gate-all-around nanowire MOSFET. d NW splits from 0nm to 11nm. High performance

thyra
Download Presentation

Nanowire Size Dependency on TSNWFET

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. Nanowire Size Dependency on TSNWFET Ref.: S. D. Suk et al., “Investigation of nanowire size dependency on TSNWFET”, IEDM Tech. Dig., pp. 891-894, 2007. Xin Sun April 16, 2008

  2. Introduction Gate-all-around nanowire MOSFET dNW splits from 0nm to 11nm • High performance • Ideal gate controllability

  3. ID-VG Characteristics • As dNW decreases, • VTH increases due to conduction band increase in limited dimension of nanowire channel. • ION decrease

  4. Current Drivability Surface and phonon scattering increase

  5. Short Channel Control • Minority carriers can be easily trapped to gate oxide by larger vertical electric field on surface. • Influence of surface conditions to channel can be enhanced with smaller nanowire.

  6. Capacitance 100x100 arrays Volume inversion

  7. Mobility Right part: volume inversion effect exceeds scattering effect. Left part: scatterings are dominant.

  8. Conclusion • Volume inversion is first confirmed by capacitance measurement on TSNWFET with various channel size. • 4nm is the optimal channel size.

More Related