Presentation p2 system design preliminary detailed design
Download
1 / 5

Presentation P2 System Design Preliminary Detailed Design - PowerPoint PPT Presentation


  • 95 Views
  • Uploaded on

Presentation P2 System Design Preliminary Detailed Design. Objectives Compile System Design Portion of your Final Presentation Compile Preliminary Block Detailed Design. Presentation P2 in Lab ~50 Minute Time Limit Per Team Come to Lab with 1 Consolidated File per Team Memory Stick or CD.

loader
I am the owner, or an agent authorized to act on behalf of the owner, of the copyrighted work described.
capcha
Download Presentation

PowerPoint Slideshow about 'Presentation P2 System Design Preliminary Detailed Design' - tarmon


An Image/Link below is provided (as is) to download presentation

Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author.While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server.


- - - - - - - - - - - - - - - - - - - - - - - - - - E N D - - - - - - - - - - - - - - - - - - - - - - - - - -
Presentation Transcript
Presentation p2 system design preliminary detailed design
Presentation P2System DesignPreliminary Detailed Design

  • Objectives

    • Compile System Design Portion of your Final Presentation

    • Compile Preliminary Block Detailed Design

Presentation P2 in Lab~50 Minute Time Limit Per TeamCome to Lab with 1 Consolidated File per Team Memory Stick or CD


Reuse project proposal presentation p1
Reuse: Project Proposal Presentation P1

  • Deliverables (Paper and Electronic)

    • Reuse the following slides for P2 (leave out lined items)

      • All Project Proposals including block diagrams

      • Team Roster and Background Slides

      • Recommended Project Description

      • High Level or User Requirements – What does it do for user?

      • Perf Requirements Summary

      • Std Requirements Summary

      • Basic Business Case

      • Refined Block Diagram - Block Diagram Description Page

      • Requirements Spreadsheet: Project Level Tabs (Excel File)

      • Requirements Spreadsheet: Block Level Tab Flowdowns (Excel File)

      • Min 1 Page on Key Risk Areas

      • 1 Page on 3 Key Patents Found for Product Area

Labs 1A-B

Lab 1C


Presentation p2
Presentation P2

  • Deliverables – Additional Product Level Slides

    • Product Safety Requirements/Standards Summary Slide(s) – Lab 2

    • Product EMC Requirements/Standards Summary Slide(s) – Lab 2

    • Product Level Design Plan Summary & Gantt Chart Slides – Lab 3

    • Overall Prototype Plan, Interconnection Strategy – Lab3


Presentation p21
Presentation P2

  • Deliverables – Additional Block Level Slides

    • Block Description and Purpose Slide – New

    • Block Performance Requirements, Allocated/Associated - New

    • Block Standard Requirements, Allocated/Associated - New

    • Block Breakdown Diagram Slide (Block Diagram of the Block) - New

    • Block Signal Input/Output Summary Slide(s) – Lab 1C

    • Block Preliminary Schematic - New (Product Design !)

      • 3-4 Bullets on Theory of Operation

    • Block Preliminary Bill of Materials (BOM) – New (Product Design !)

    • Block Detailed Design Calculations & Component Selection – New

      • See Next Page

For Each Block

~10 min


Presentation p22
Presentation P2

Additional Block Detailed Design Slide Content

Detailed Design Calculations & Component Selections

  • Device Package Type Rationale

  • Nominal Resistance, Capacitance, Inductance Values & % Tolerance Calculations

  • Resistor Compositions, Capacitor Dielectric, Inductor Winding; Selection Rationale

  • Resistor, Capacitor, Inductor, Diode, Transistor & IC Max Voltage Calculations

  • Resistor, Inductor, Transistor, Diode, Xfmr, & IC Max Power Calculations

  • Power Electronics Heat Sink qj Calculations and Max Die Temp Rise Above Ambient

  • EMC Devices including filters, ferrites, transient absorbers, etc

  • Safety Devices such as Current Limiters incl Fuses, Breakers, GFCI, etc

  • Wire Gauges, Interconnect Contact, & Trace Width Ratings

  • Op-Amp Selections including Ib, Vio, CMRR, Slew Rate, Iout & Error Voltage Calculations

  • Logic Family Selection including Interface Compatibility, Speed, Power

  • CPU and/or PLD Types and Clock Speed, Performance Capabilities

  • Regulator Basic Performances incl % line and % load regulations

  • Nominal Time Domain Operational Simulations

  • Nominal Frequency Domain Operational Simulations

  • Worst Case or Monte-Carlo Simulations

  • Additional Analog Circuit DFM Analysis as applicable