1 / 26

Bridging Router Performance and Queuing Theory

Bridging Router Performance and Queuing Theory. N. Hohn*, D. Veitch*, K. Papagiannaki , C. Diot *: University of Melbourne This work appeared at ACM Sigmetrics 2004. Motivation. End-to-end packet delay is an important metric for performance and SLAs

talisa
Download Presentation

Bridging Router Performance and Queuing Theory

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript


  1. Bridging Router Performance and Queuing Theory N. Hohn*, D. Veitch*, K. Papagiannaki, C. Diot *: University of Melbourne This work appeared at ACM Sigmetrics 2004

  2. Motivation • End-to-end packet delay is an important metric for performance and SLAs • Building block of end-to-end delay is through router delay • We measure the delays incurred by all packets crossing a single router

  3. Overview • Full Router Monitoring • Delay Analysis and Modeling • Delay Performance: Understanding and Reporting

  4. Measurement Environment

  5. Packet matching

  6. Overview • Full Router Monitoring • Delay Analysis and Modeling • Delay Performance: Understanding and Reporting

  7. Not part of the system Store & Forward Datapath • Store: storage in input linecard’s memory • Forwarding decision • Storage in dedicated Virtual Output Queue (VOQ) • Decomposition into fixed-size cells • Transmission through switch fabric cell by cell • Packet reconstruction • Forward: Output link scheduler

  8. Delays: 1 minute summary

  9. Not part of the system Δ(L) Store & Forward Datapath • Store: storage in input linecard’s memory • Forwarding decision • Storage in dedicated Virtual Output Queue (VOQ) • Decomposition into fixed-size cells • Transmission through switch fabric cell by cell • Packet reconstruction • Forward: Output link scheduler

  10. Minimum Transit Time Packet size dependent minimum delay Δ(L), specific to router architecture and linecard technology

  11. Not part of the system Δ(L) FIFO queue Store & Forward Datapath • Store: storage in input linecard’s memory • Forwarding decision • Storage in dedicated Virtual Output Queue (VOQ) • Decomposition into fixed-size cells • Transmission through switch fabric cell by cell • Packet reconstruction • Forward: Output link scheduler

  12. Modeling

  13. Modeling Fluid queue with a delay element at the front

  14. Model Validation

  15. Error as a function of time

  16. Modeling results • Our crude model performs well • Use effective link bandwidth (account for encapsulation) • Small gap between router performance and queueing theory! • The model defines Busy Periods: time between the arrival of a packet to theempty system and the time when the system becomes empty again.

  17. Overview • Full Router Monitoring • Delay Analysis and Modeling • Delay Performance: Understanding and Reporting

  18. On the Delay Performance • SNMP utilization not sufficient to predict delay • Model allows for router performance evaluation when arrival patterns are known • Goal: metrics that • Capture operational-router performance • Can answer performance questions directly • Busy Period structures contain alldelay information

  19. A ts D Busy periods metrics

  20. Property of significant BPs

  21. Triangular Model

  22. Issues • Report (A,D) measurements • There are millions of busy periods even on a lightly utilized router • Interesting episodes are rare and last for a very small amount of time

  23. Report BP joint distribution

  24. Duration of Congestion Level-L

  25. Conclusion • Results • Full router empirical study • Delay modeling • Reporting performance metrics

  26. Thank you! dina.papagiannaki@intel.com

More Related