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Overview

Overview. The LC-3 Computer - A limited “3 address” machine Computer machine instructions - the basic instructions that all programs use on that computer The Instruction Cycle - the steps in the execution of a machine language instruction The Operate Instructions

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Overview

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  1. Overview • The LC-3 Computer • - A limited “3 address” machine • Computer machine instructions • - the basic instructions that all programs use on that computer • The Instruction Cycle • - the steps in the execution of a machine language instruction • The Operate Instructions • - ADD, AND, NOT • The Data Movement Instructions • - Load, Load Address, Store

  2. LC-3 Data Path: Combinational Logic Storage State Machine

  3. Computer Machine Instruction Formats • What is contained IN an instruction? • Specifies the operation to be performed • Where to get the operands • Where to put the result • What are the major instruction types? • Operate (add, sub, mult,OR, AND, etc.) • Data Movement (Load, Store) • Control (branch, jump to subroutine, etc.)

  4. The LC-3 Instruction • ADDRESSING MODES • Immediate • (Operand is in the instruction) • Register • (Operand is in one of the 8 registers) • PC-relative • (Operand is “offset” from the (PC) ) • Base + Offset (Base relative) • (Operand is “offset” from the contents of a register) • Indirect • (The “Operand” actually points to the real address • – rather than being the operand)

  5. The Instruction Cycle • Steps (or phases): • Fetch Next Instruction from Memory • (PC)  (points to) next instruction • PC (PC) + 1 • Decode Fetched Instruction • Evaluate Address (es) • Fetch Operand (s) • Execute Operation • Store Result (if specified)

  6. LC-3 Memory Layout • X000 – x2FFF Operating System programs, tables, and data • Generally off limits to applications programmer • (Program run in Supervisor mode) • X3000 – xFDFF User Program Area • Area shared by users like you • (Run in non-Supervisor mode) • xFE00 – xFFFF Device Register Addresses • “Mapped” memory used for input/output • R0-R7 Registers

  7. Operate Instructions • Only three operations: ADD, AND, NOT • Source and Destination operands are registers

  8. LC-3 Instructions (Fig 5.3 – Appendix a)

  9. ADD/AND (Register)

  10. NOT (Register) Note: Src and Dstcould be the same register.

  11. ADD/AND (Immediate) Note: Immediate field issign-extended.

  12. Data Movement Instructions • Load -- read data from memory to register • LD: PC-relative mode [0010 DR PCoffset9] • LDI: indirect mode [1010 DR PCoffset9] • LDR: base+offset mode [0110 DR BaseR offset6] • Store -- write data from register to memory • ST: PC-relative mode [0011 DR PCoffset9] • STI: indirect mode [1011 DR PCoffset9] • STR: base+offset mode [0111 DR BaseR offset6] • Load effective address – address saved in register • LEA: immediate mode [1110 DR PCoffset9]

  13. LD (PC-Relative)

  14. ST (PC-Relative)

  15. LDI (Indirect)

  16. STI (Indirect)

  17. LDR (Base+Offset)

  18. STR (Base+Offset)

  19. LEA (Immediate)

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