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Lecture 1: Introduction to Digital Logic Design. CK Cheng CSE Dept. UC San Diego. Outlines. Administration Motivation Scope. Administration. Web site: http://www.cse.ucsd.edu/classes/sp09/cse140/ WebBoard: http://webboard.ucsd.edu. Administration.

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outlines
Outlines
  • Administration
  • Motivation
  • Scope
administration
Administration

Web site:

http://www.cse.ucsd.edu/classes/sp09/cse140/

WebBoard:

http://webboard.ucsd.edu

administration4
Administration

Instructor: CK Cheng, CSE2130, ckcheng+140@ucsd.edu, 858 534-6184

Teaching Assistants:

  • Thomas Weng, thomaslw@gmail.com
  • Renshen Wang, rewang@cs.ucsd.edu
  • Chengmo Yang, c5yang@cs.ucsd.edu
  • Mingjing Chen, mjchen@cs.ucsd.edu
administration5
Administration

Schedule

  • Outlines (Use index to check the location of the textbook)
  • Lectures: 2:00-3:20PM, TTh, Center 216.
  • Discussion: 2:00-2:50PM, M, Center 212.
  • Office hours: 10:30-11:30AM, TTh, CSE 2130.
administration6
Administration

Textbook

  • Digital Design and Computer Architecture, David Money Harris and Sarah L. Harris, published by Morgan Kaufmann, 2007.

Grading

  • Midterm 1: 25% (T 4/21)
  • Midterm 2: 30% (Th 5/14)
  • Final Exam: 40% (3:00-6:00PM, Th 6/11)
motivation
Motivation
  • Microprocessors have revolutionized our world
    • Cell phones, internet, rapid advances in medicine, etc.
  • The semiconductor industry has grown from $21 billion in 1985 to $213 billion in 2004.
robert noyce 1927 1990
Robert Noyce, 1927 - 1990
  • Nicknamed “Mayor of Silicon Valley”
  • Cofounded Fairchild Semiconductor in 1957
  • Cofounded Intel in 1968
  • Co-invented the integrated circuit
gordon moore 1929
Gordon Moore, 1929 -
  • Cofounded Intel in 1968 with Robert Noyce.
  • Moore’s Law: the number of transistors on a computer chip doubles every year (observed in 1965)
  • Since 1975, transistor counts have doubled every two years.
moore s law
Moore’s Law

“If the automobile had followed the same development cycle as the computer, a Rolls-Royce would today cost $100, get one million miles to the gallon, and explode once a year . . .”

– Robert Cringley

scope
Scope
  • The purpose of this course is that we:
    • Learn what’s under the hood of an electronic component
    • Learn the principles of digital design
    • Learn to systematically debug increasingly complex designs
    • Design and build a digital system
scope12
Scope
  • Hiding details when they aren’t important
slide13

We will cover four major things in this course:- Combinational Logic (Ch 2)- Sequential Networks (Ch 3)- Standard Modules (Ch 5)- System Design (Chs 4, 6-8)

overall picture of cs140

Input

Memory File

Conditions

Pointer

Mux

Control

Subsystem

ALU

Control

Memory Register

Conditions

Overall Picture of CS140

CLK: Synchronizing Clock

combinational logic vs sequential network

x1

.

.

.

xn

x1

.

.

.

xn

x1

.

.

.

xn

fi(x)

fi(x)

fi(x)

fi(x)

fi(x)

fi(x)

Combinational Logic vs Sequential Network

si

CLK

Combinational logic:

Sequential Networks

1) Memory 2) Time Steps (Clock)

yi = fi(x1,..,xn)

yit = fi (x1t,…,xnt, s1t, …,smt)

Sit+1 = gi(x1t,…,xnt, s1t,…,smt)

part i combinational logic
Part I. Combinational Logic

ab

a

b

ab + cd

e (ab+cd)

c

d

cd

e

  • I) Specification
  • II) Implementation
  • III) Different Types of Gates