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Microprocessors I

Microprocessors I. 8051 Addressing Modes. CS-00871 Prof. Msc. Ivan A. Escobar iescobar@itesm.mx. Introduction. Assembly language is machine dependant. Each family of microprocessors or microncontrollers has its own instruction set.

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Microprocessors I

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  1. Microprocessors I 8051 Addressing Modes CS-00871 Prof. Msc. Ivan A. Escobar iescobar@itesm.mx

  2. Introduction • Assembly language is machine dependant. • Each family of microprocessors or microncontrollers has its own instruction set. • Each instruction has an 8 bit op-code with an associated mnemonic. • Some instructions have one or two additional bytes for operand (data or addresses).

  3. Data Transfer Instructions • Data is stored at the source address and moved (copied) to a destination address. • The way these addresses are specified are determined by the addressing mode. • There are 28 different instructions for data transfer, which can be categorized into three types: • MOV <dest>, <src> • Push <source> or Pop <dest> • XCH <dest>,<src>

  4. Addressing Modes • When operating with data, where does it reside? • As part of the instruction? • In a register? • In general memory? • In external memory? • The 8051 has numerous modes of addressing data.

  5. Available Modes • Immediate • Register • Direct • Indirect • Relative • Absolute • Long • Indexed

  6. Immediate Addressing • The data is numeric constant in the operand. • Indicated by a # sign. • MOV A, #34h Moves the value of 34 hex into the Acc. • 2 byte instruction: • Opcode | Data • Useful for getting constants into registers

  7. Immediate Addressing • The immediate value is a maximum of 8-bits. • One exception, when dealing with the DPTR register it can be 16-bits. • MOV DPTR, #2000H ; Load the value 2000H into the DPTR register • MOV R0, #0F0H ; Load R0 with the value F0H

  8. Register Addressing • Direct access to eight registers – R0 through R7. • MOV A, R0 • MOV R1, A • ADD A, R1 • Not all combinations are valid. • MOV R2, R1 ; Invalid

  9. Register Addressing • There are 4 banks of registers accessible through register addressing. • Only one bank can be accessed at a time controllable through bit RS0 and RS1 of the PSW • MOV PSW, #00011000B • Set RS0:RS1 to 11, therefore, accessing register bank 3.

  10. Register Addressing • The register is part of the Op-code. Allows for a 1 byte instruction. • Op-code uses 3 bits for Rn • MOV A, R3 • Moves the contents of R3 into the Acc.

  11. Direct Addressing • Access any on-chip RAM location • General purpose registers. • Control registers. • May be addressed by location or name • MOV E0h, #33h Moves the hex value of 33 into memory location E0h. • MOV P0, #85h Moves the hex value 85 into P0 register port. • 2 byte instruction + possible data • Opcode | Direct Address | Data

  12. Direct Addressing • All on-chip memory locations and registers have 8-bit addresses. • Can use the 8-bit address in the instruction. • MOV A, 4H ; Amem[04H] • Or can use the register name. • MOV A, R4 • Don’t get confused with Immediate mode. • No “#” sign.

  13. Indirect Addressing • R0 or R1 hold the location of the internal RAM location. • Indicated by the @ sign. • MOV A, @R1 Moves the contents of the memory address indicated by R1 to the Acc. • Example: If R1 contains 23h, the contents of address 23h will be moved to the Acc. • One byte instruction: • Opcode using 1 bit for R0 or R1.

  14. Indirect Addressing • Example: • MOV R1, #40H ; Make R1 point to location 40 • MOV A, @R1 ; Move the contents of 40H to A • MOV @R0, R1 ; Move contents of R1 into the memory location pointed to by R0.

  15. Indirect Addressing • Can also be used for accessing external memory: • Can use R0 and R1 to point to external memory locations 00H to FFH. • MOVX A, @R1 ; Move contents of external memory location whose address is in R1 into A • Can also use DPTR to point to all 64k of external memory. • MOVX A, @DPTR

  16. Relative Addressing • Used with certain jumps. • A jump is made from current address to a +127 or -128 memory location. • SJMP #20h • PC = PC + 20 (jump ahead 20 addresses). • 2 Byte instruction: • Opcode | Relative offset

  17. Absolute Addressing • Used with ACALL (Absolute call) and AJMP (Absolute Jump). • Allows a call within a 2K page of memory. • The op-code contains 3 of the 11 bits of the address, the operand contains lower 8 bits. • 2 bytes instruction: • 3 bits+op-code | lower 8-bit address. • The address being called must be with the same 2K page.

  18. Long Addressing • Used with LCALL (Long Call) and LJMP (Long Jump) instructions. • Allows jumping to any 16-bit address. • 3 bytes instruction: • Opcode | High order | Low order

  19. Indexed Addressing • Use a register for storing a pointer to memory and another register for storing an offset. • The effective address is the sum of the two: • EA = Pointer + Offset • MOVC A, @A+DPTR ; Move byte from memory located at DPTR+A to A.

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