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SoD Lab Current Status – NCTU EE. Nelson Yen Chung Chang Department and Institute of Electronics, NCTU 2003/9/12. Outline. Previous Experience Current Plan. IP Core Design 2001. 2001 (Fall) September ~ 2002 January Instructor: Professor Chien-Wei Jen TAs: Kun-Bin Lee Yuan-Chung Lee
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SoD Lab Current Status – NCTU EE Nelson Yen Chung Chang Department and Institute of Electronics, NCTU 2003/9/12
Outline • Previous Experience • Current Plan
IP Core Design 2001 • 2001 (Fall) September ~ 2002 January • Instructor: • Professor Chien-Wei Jen • TAs: • Kun-Bin Lee • Yuan-Chung Lee • Jih-Ying Lin • Nelson Yen-Chung Chang • Tzung-Shian Yang • Contents • 3 hours lecture in each week • 4 Labs • Homework • HW#1: Baseline JPEG Software Encoder: ARMulator (2 weeks) • HW#2: Baseline JPEG Software Encoder: Integrator (2 weeks) • HW#3: Virtual Prototyping of JPEG Software Encoder (2 weeks) • HW#4: Soft IP for JPEG Software Encoder (3 weeks)
IP Core Design 2002 • 2002 (Fall) September ~ 2003 January • Instructor: • Professor Chien-Wei Jen • TAs: • Kun-Bin Lee • Nelson Yen-Chung Chang • Yu-Ming Chang • Hao-Yun Chin • Contents • 3 hours lecture in each week • 6 Labs • Homework • HW#1: Software Implementation of Target IP (2 weeks) • HW#2: Software Implementation Optimized for ARM Integrator Environment (2 weeks) • HW#3: Digital IP Authoring (2 weeks) • HW#4: Rapid Prototyping (3 weeks)
Outline • Previous Experience • Current Plan
SoC Design Lab 2004 • 2004 Spring • Instructor: • Professor Tian-Sheuang Chang • Notes: • Lab oriented • Using tools of later version • Xilinx ISE 4.1i (or 5.1i) for Rapid prototyping • Simpler work flow • Less error prone • Faster