Statistical Analysis and Design: From Picoseconds to Probabilities

1. Statistical Analysis and Design: From Picoseconds to Probabilities Chandu Visweswariah IBM Thomas J. Watson Research Center Yorktown Heights, NY http://www.research.ibm.com/people/c/chandu With acknowledgments to the extended timing, modeling, synthesis and methodology teams at IBM Yorktown, Fishkill and Burlington Statistical Analysis and Design: From Picoseconds to Probabilities

2. Happy Independence Day! Statistical Analysis and Design: From Picoseconds to Probabilities

3. Propositions (and outline) • Variability is proportionately increasing; therefore, a new paradigm is required • Correlations matter • Statistical timing tools are rising to the challenge • Robustness is an important metric • Statistical treatment of variability will pervade all aspects of chip design methodology, manufacturing and test • ASICs and processors will both benefit Statistical Analysis and Design: From Picoseconds to Probabilities

4. Section 1: The Problem… and what exactly is a statistical timer? Statistical Analysis and Design: From Picoseconds to Probabilities

5. Is this worth a hugeinvestment? The march of technology Performance Technology generation Statistical Analysis and Design: From Picoseconds to Probabilities

6. The source of the problem • Variability is proportionately increasing • manufacturing • FEOL: critical dimensions are scaling faster than our control of them • BEOL: variability dramatically increases the number of independent and significant sources of variation • environmental (Vdd, temperature) • fatigue (NBTI, hot electron effect) • across-chip (OCV/ACLV, temperature, Vdd) • circuit design (PLL jitter, coupling noise,SOI history) • model-to-hardware correlation Statistical Analysis and Design: From Picoseconds to Probabilities

7. Delay impact of variations [Courtesy Kerim Kalafala] • Requires 220 timing runs or [-65%,+80%] guard band! Statistical Analysis and Design: From Picoseconds to Probabilities

8. Can you answer these questions about your favorite digital chip? • What does 5% random delay variability on each gate and wire do to your frequency distribution? • What does 5% correlated delay variability do to your frequency distribution? • What % delay variation leads to a hold violation? • How many yield points does OCV/ACLV cost? • What is the shape of your parametric yield curve? • What is the sensitivity of your chip’s frequency to • thickness of a metal level? • gate/wire mistracking? • N/P mistracking? • mistracking between metal levels i and j? Statistical Analysis and Design: From Picoseconds to Probabilities

9. New paradigm required • ASICs • old paradigm: sign-off is corner- or case-based • would require 220 timing runs to hit all corners • cumbersome, risky and pessimistic all at the same time! • Microprocessors • for the most part, nominal performance is targeted • some ad hoc methods to deal with certain types of mistracking • Both • our design/synthesis methods do not target robustness, nor do our timing tools measure robustness or give credit for robust design • Solution: statistical timing and optimization Statistical Analysis and Design: From Picoseconds to Probabilities

10. ITRS predictions Statistical Analysis and Design: From Picoseconds to Probabilities

11. Statistical Analysis and Design: From Picoseconds to Probabilities

12. Statistical Analysis and Design: From Picoseconds to Probabilities

13. Statistical Analysis and Design: From Picoseconds to Probabilities

14. Netlist + assertions Static timer Delay and slew models 1. Yield curve 2. Diagnostics 1. Slack 2. Diagnostics Statistical timer Statistics of the sources of variability Dependence on sources of variability What is a statistical timer? Statistical Analysis and Design: From Picoseconds to Probabilities

15. ¢ $ $$ ¢¢ Parametric yield curve Yield Clock frequency Statistical Analysis and Design: From Picoseconds to Probabilities

16. Section 2: The Importance of Correlations… and why they make computations a pain Statistical Analysis and Design: From Picoseconds to Probabilities

17. Importance of correlations • Consider a circuit with 50K latches, each with a setup and hold test, each of which has a 99.99% probability of being met • If all tests are perfectly correlated,yield = 99.99% • If all tests are perfectly independent,yield = 0.005% • The truth is closer to the perfectly correlated case! Statistical Analysis and Design: From Picoseconds to Probabilities

18. Correlation due to path sharing Statistical Analysis and Design: From Picoseconds to Probabilities

19. Clock and cell-type correlation Statistical Analysis and Design: From Picoseconds to Probabilities

20. Voltage island correlation Statistical Analysis and Design: From Picoseconds to Probabilities

21. Global correlation Statistical Analysis and Design: From Picoseconds to Probabilities

22. Temperature/Vdd correlation Statistical Analysis and Design: From Picoseconds to Probabilities

23. Geographical correlation [From M. Orshansky, L. Milor, P. Chen, K. Keutzer, C. Hu, ICCAD 2000] Statistical Analysis and Design: From Picoseconds to Probabilities

24. Types of variability • Global within a die/reticle • metal dimensions • device family strength mistracking • ambient temperature and power supply • Spatial/local correlation across a die/reticle • Leff • junction temperature, Vdd • Independently random • tox • doping effects Statistical Analysis and Design: From Picoseconds to Probabilities

25. a + c + MAX b a + c + MAX b First-cut approach to static timing • Deterministic • Statistical • Question: what do correlations do to the MAX and PLUS operations? Statistical Analysis and Design: From Picoseconds to Probabilities

26. Note! The max of two unit Gaussians Probability       Delay Statistical Analysis and Design: From Picoseconds to Probabilities

27. Equally critical signals (=0) Probability 30 2 3 1 Delay Statistical Analysis and Design: From Picoseconds to Probabilities

28. Equally critical signals (=0.5) Probability 30 2 3 1 Delay Statistical Analysis and Design: From Picoseconds to Probabilities

29. Equally critical signals (=1.0) Probability 30 2 3 1 Delay Statistical Analysis and Design: From Picoseconds to Probabilities

30. Thirty equally critical signals Probability =1 =0.5 =0 Delay Statistical Analysis and Design: From Picoseconds to Probabilities

31. tuned uncertainty-aware tuned untuned Slack histogram #paths slack +20 ps Statistical Analysis and Design: From Picoseconds to Probabilities

32. The sum of n unit Gaussians (=1.0) Probability Delay Statistical Analysis and Design: From Picoseconds to Probabilities

33. The sum of n unit Gaussians (=0.5) Probability Delay Statistical Analysis and Design: From Picoseconds to Probabilities

34. The sum of n unit Gaussians (=0) Probability Delay Statistical Analysis and Design: From Picoseconds to Probabilities

35. Summary: the sum of 10 unit Gaussians Probability    Delay Statistical Analysis and Design: From Picoseconds to Probabilities

36. Conventional wisdom revisited • Conventional wisdom says, “Use sizing and multiple Vts to tune the circuit aggressively, creating a wall of critical paths • the new wisdom is to optimize the expected value of the critical path delay, which in turn means reducing the wall of critical paths • Conventional wisdom says, “Make pipeline stages short and crank up clock frequency” • the new wisdom is to take advantage of RMS/ RSS effects in moderately longer pipelines Statistical Analysis and Design: From Picoseconds to Probabilities

37. Separating out independent randomness New: systematicvariability N(20,2/3) Old: N(20,1) New: independentvariability N(0,1/3) Statistical Analysis and Design: From Picoseconds to Probabilities

38. Case study • Consider a critical path of 50 identical gates • Old: assume delay of each gate is N(20,1) ps (corner delays are 17 and 23 ps) • New: assume delay of each gate is N(20,2/3) ps + N(0,1/3) ps (same corner delays) • Old: critical path delay (3) = 2350 = 1150 ps • New: critical path delay (3) =2250 + 31/350 = 1100 + 7.1 = 1107.1 • Improvement in critical path delay = 3.7% • This case study can be generalized Statistical Analysis and Design: From Picoseconds to Probabilities

39. Generalization of case study • As N↑, the benefit ↑ • As v↑, the benefit ↑ • As f↑, the benefit ↑ Rule of thumb: for 50 stages and5% variability (), each percent ofindependent variability buys 0.1%of critical path delay improvement Statistical Analysis and Design: From Picoseconds to Probabilities

40. Plot of benefit for N=50 Statistical Analysis and Design: From Picoseconds to Probabilities

41. What about shorter paths (=5%)? Statistical Analysis and Design: From Picoseconds to Probabilities

42. M equally critical paths • Basic issue • suppose there are M equally critical paths • each of these paths has already received RMS credit, so the delay of each path consists of • a constant which is the nominal/intrinsic delay of the path plus the corner-based systematic variability • an independent variability part for which we have received an RMS credit, so there is a small probability that the delay is beyond the 3 limit • with a large number of equally critical paths, the 3 of the MAX delay of all M paths is not equal to the 3 delay of each of the M paths • question: how big is this sigma shift? Statistical Analysis and Design: From Picoseconds to Probabilities

43. A little analysis • Example: with M=50, we have to use a 4.037 value on the random part instead of 3 to get a “true 3” delay on the maximum delay of 50 paths;this diminishes RSS credit • The benefit after taking this into account is plotted in general versusM and N on the next page, assuming f=1/3, v=5% Statistical Analysis and Design: From Picoseconds to Probabilities

44. Benefit of RMS credit + equally crit. paths Statistical Analysis and Design: From Picoseconds to Probabilities

45. N(10,1) N(10,1) N(10,1) Arrival time=0 Statistical timing experiment • How will slack change with ? N(10,1) N(10,1) N(10,1) Arrival time=0 Data Latch with zero setup guard time Clock Statistical Analysis and Design: From Picoseconds to Probabilities

46. Timing experiment result Probability =1 =0.5 =0 Slack Statistical Analysis and Design: From Picoseconds to Probabilities

47. There’s no question: correlation’s a pain Of neat math. formulas, it’s the bain! Though your timer becomes a morass It’s correlation that saves your … (chip) Statistical Analysis and Design: From Picoseconds to Probabilities

48. Section 3: Statistical Timing Tools… can they rise to the challenge? Statistical Analysis and Design: From Picoseconds to Probabilities

49. Statistical timing tools • Path-based • conduct a nominal timing analysis • list a representative set of critical paths (question: how may paths? question: which paths?) • model the delay/slack of each path as a function of random variables (the underlying sources of variation) • predict the parametric yield curve (statistical MIN of all path slacks), as well as generate diagnostics • Block-based • propagate arrival times and required arrival times in the form of probability distributions • linear time • approximate, quick-and-dirty Statistical Analysis and Design: From Picoseconds to Probabilities

50. Statistical timing tools Statistical Analysis and Design: From Picoseconds to Probabilities